Search Results - "SCHWALKE, Udo"
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Evaluation of MOSFETs with crystalline high-k gate-dielectrics: device simulation and experimental data
Published in Journal of Telecommunications and Information Technology (01-06-2023)“…The evaluation of the world’s first MOSFETs with epitaxially-grown rare-earth high-k gate dielectrics is the main issue of this work. Electrical device…”
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2
Superior Sensitivity and Optical Response of Blue Phosphorene and Its Doped Systems for Gas Sensing Applications
Published in ACS omega (27-07-2021)“…The first-principles calculation of pristine, B-, Al-, Ga-, Sb-, and Bi-doped blue phosphorene (BlueP) with adsorbed SO2, NO, and NO2 gas molecules including…”
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3
Process integration and nanometer-scale electrical characterization of crystalline high- k gate dielectrics
Published in Microelectronics and reliability (01-05-2005)“…Crystalline praseodymium oxide (Pr 2O 3) high- k gate dielectric has been successfully integrated into a polysilicon gate CMOS technology. Fully functional…”
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Journal Article Conference Proceeding -
4
Gate dielectrics: process integration issues and electrical properties
Published in Journal of Telecommunications and Information Technology (30-03-2005)“…In this work we report on the process integration of crystalline praseodymium oxide (Pr2O3) high-k gate dielectric. Key process steps that are compatible with…”
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5
Ultra-thick gate oxides: charge generation and its impact on reliability
Published in Microelectronics and reliability (01-07-2001)“…In this work, degradation and breakdown characteristics of ultra-thick gate oxides ( T ox: 50–150 nm) used in power MOS devices is investigated. Measurements…”
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Insitu CCVD grown bilayer graphene transistors for applications in nanoelectronics
Published in Applied surface science (01-02-2014)“…•Bilayer graphene FETs suitable for applications in nanoelectronics.•Application as memory devices in nanoelectronics after appropriate downscaling.•Bilayer…”
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7
On the Physical Behavior of Cryogenic IV and III-V Schottky Barrier MOSFET Devices
Published in IEEE transactions on electron devices (01-09-2017)“…The physical influence of temperature down to the cryogenic regime is analyzed in a comprehensive study and the comparison of IV and III-V Schottky barrier…”
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Transfer-free grown bilayer graphene transistors for digital applications
Published in Solid-state electronics (01-03-2013)“…► Transfer-free and in situ grown bilayer graphene field effect transistors. ► Bilayer graphene FETs possess an extremely high on/off-current ratio up to 1E7…”
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Damascene TiN-Gd2O3-gate stacks: Gentle fabrication and electrical properties
Published in Microelectronic engineering (01-12-2011)Get full text
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10
Dual-Workfunction Gate Engineering in a Corner Parasitics-Free Shallow-Trench-Isolation Complementary-Metal-Oxide-Semiconductor Technology
Published in Japanese Journal of Applied Physics (01-04-1999)“…In this work, through-the-gate implantation (TGI) of channel- and well-doping is favorably combined with n + /p + gate implantation. This approach offers an…”
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Large-Scale In Situ Fabrication of Voltage-Programmable Dual-Layer High- \kappa Dielectric Carbon Nanotube Memory Devices With High On/Off Ratio
Published in IEEE electron device letters (01-12-2008)“…In this letter, we report on measurements of carbon nanotube (CNT) field-effect transistors with high on/off ratio to be used as nonvolatile memory cells…”
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12
Silicon-CMOS compatible in-situ CCVD grown graphene transistors with ultra-high on/off-current ratio
Published in Physica. E, Low-dimensional systems & nanostructures (01-04-2012)“…By means of catalytic chemical vapor deposition (CCVD) in-situ grown monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors…”
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13
Damascene TiN-Gd sub(2O) sub(3)-gate stacks: Gentle fabrication and electrical properties
Published in Microelectronic engineering (01-12-2011)“…In this work, we present MOS capacitors and field effect transistors with a crystalline gadolinium oxide (Gd sub(2O) sub(3)) gate dielectric and metal gate…”
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14
Electrical characterization of crystalline Gd2O3 gate dielectric MOSFETs fabricated by damascene metal gate technology
Published in Microelectronics and reliability (01-04-2007)Get full text
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15
Damascene TiN–Gd 2O 3-gate stacks: Gentle fabrication and electrical properties
Published in Microelectronic engineering (2011)“…In this work, we present MOS capacitors and field effect transistors with a crystalline gadolinium oxide (Gd 2O 3) gate dielectric and metal gate electrode…”
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16
Silicon-CMOS Compatible Transfer-Free Fabrication of Nanocrystalline Graphene Field-Effect Devices for Smart Gas-Sensor Applications
Published in 2019 Electron Devices Technology and Manufacturing Conference (EDTM) (01-03-2019)“…We report on a method to mass-fabricate graphene-based ultra-sensitive gas sensors on oxidized silicon wafers without the need to transfer graphene layers. By…”
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Conference Proceeding -
17
Computation beyond moore's law: Adaptive field-effect devices for reconfigurable logic and hardware-based neural networks
Published in 2015 International Conference on Computing, Communication and Security (ICCCS) (01-12-2015)“…The success of integrated silicon technology is based on the down-scaling of minimum feature sizes of silicon field-effect devices (MOSFETs) in a complementary…”
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Conference Proceeding -
18
Dopant-independent and voltage-selectable silicon-nanowire-CMOS technology for reconfigurable logic applications
Published in 2010 Proceedings of the European Solid State Device Research Conference (01-09-2010)“…In this paper, we report on the fabrication and characterization of a novel voltage-selectable (VS) nanowire (NW) CMOS technology suitable to extend the…”
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Conference Proceeding -
19
Process damage-free damascene metal gate technology for gentle integration of epitaxially grown high- k
Published in Microelectronic engineering (2008)“…This paper presents the first successful attempt to integrate crystalline high- k gate dielectrics into a virtually damage-free damascene metal gate process…”
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Electrical characterization of crystalline Gd 2O 3 gate dielectric MOSFETs fabricated by damascene metal gate technology
Published in Microelectronics and reliability (2007)“…This paper presents the first successful attempt to integrate crystalline high- K gate dielectrics into a virtually damage-free damascene metal gate process…”
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