Search Results - "Roy, Surajit Kumar"

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  1. 1

    Fault Detection and Diagnosis of DMFB Using Concurrent Electrodes Actuation by Ghosh, Sourav, Kumar Roy, Surajit, Giri, Chandan

    Published in Journal of electronic testing (01-02-2023)
    “…Digital Microfluidic Biochip (DMFB) is a heartening replacement to the conventional approach of biochemical laboratory tests. Air quality monitoring,…”
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    Journal Article
  2. 2

    TSV-Cluster Defect Tolerance Using Tree-Based Redundancy for Yield Improvement of 3-D ICs by Maity, Dilip Kumar, Roy, Surajit Kumar, Giri, Chandan

    “…Through silicon via (TSV)-based 3-D integrated circuit (3-D IC) has several advantages like high density, high bandwidth, and low-power consumption. However,…”
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    Journal Article
  3. 3

    Iterative Parallel Test to Detect and Diagnose Multiple Defects for Digital Microfluidic Biochip by Ghosh, Sourav, Maity, Dolan, Chowdhury, Arijit, Kumar Roy, Surajit, Giri, Chandan

    Published in 2019 IEEE 28th Asian Test Symposium (ATS) (01-12-2019)
    “…Digital microfluidic biochip is a revolutionizing platform to execute complex bioassay operations concurrently. Dependability is an important feature of…”
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    Conference Proceeding
  4. 4

    Cluster-aware allocation of spare TSVs for enhanced reliability in 3D ICs by Maity, Dilip Kumar, Roy, Surajit Kumar, Giri, Chandan

    Published in Microelectronics and reliability (01-12-2023)
    “…Three-dimensional Integrated-Circuits (3D ICs) based on Through-Silicon-Via (TSV) technology offer numerous advantages, including high density, enhanced…”
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    Journal Article
  5. 5

    Frequency-scaled thermal-aware test scheduling for 3D ICs using machine learning based temperature estimation by Chatterjee, Subhajit, Roy, Surajit Kumar, Giri, Chandan, Rahaman, Hafizur

    Published in Microelectronics (01-10-2022)
    “…Three-dimensional Integrated Circuits (3D IC) are being looked at as an alternative in overcoming some critical challenges plaguing conventional 2D ICs…”
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    Journal Article
  6. 6

    A cost-effective repair scheme for clustered TSV defects in 3D ICs by Maity, Dilip Kumar, Roy, Surajit Kumar, Giri, Chandan

    Published in Microelectronics and reliability (01-02-2022)
    “…The current industry trend favors TSV (Through-Silicon-Via) based 3D ICs (Three-dimensional Integrated-Circuits) due to their several benefits. However, the…”
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    Journal Article
  7. 7

    Built-in Self-prevention (BISP) for runtime ageing effects of TSVs in 3D ICs by Maity, Dilip Kumar, Roy, Surajit Kumar, Giri, Chandan

    Published in Integration (Amsterdam) (01-01-2024)
    “…The adoption of Through-Silicon-Vias (TSVs) in Three-Dimensional Integrated Circuits (3D ICs) is gaining momentum in the industry, thanks to the numerous…”
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    Journal Article
  8. 8

    Threshold Analysis Using Probabilistic Xgboost Classifier for Hardware Trojan Detection by Dhar, Tapobrata, Das, Ranit, Giri, Chandan, Roy, Surajit Kumar

    Published in Journal of electronic testing (01-08-2023)
    “…The fabless nature of integrated circuits manufacturing leaves them vulnerable to modifications by ill-intentioned third party. There arises a necessity for…”
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    Journal Article
  9. 9

    Identification of Random/Clustered TSV Defects in 3D IC During Pre-Bond Testing by Maity, Dilip Kumar, Roy, Surajit Kumar, Giri, Chandan

    Published in Journal of electronic testing (01-10-2019)
    “…Three-dimensional Integrated Circuits (3D ICs) based on Through-Silicon Vias (TSVs) provide many benefits, such as high density, high bandwidth and low-power…”
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    Journal Article
  10. 10

    Hardware Trojan Detection by Stimulating Transitions in Rare Nets by Dhar, Tapobrata, Roy, Surajit Kumar, Giri, Chandan

    “…Outsourcing in the various stages of Integrated Circuit (IC) manufacturing process leaves the ICs vulnerable to inclusion of malicious circuitry called…”
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    Conference Proceeding
  11. 11

    Design-for-test and test time optimization for 3D SOCs by Roy, Surajit Kumar, Giri, Chandan

    “…Three dimensional (3D) integration based on through-Silicon-Via (TSV) is currently evolving as an area of great interest in modern semiconductor industry. 3D…”
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    Conference Proceeding
  12. 12

    Optimization of Test Wrapper for TSV Based 3D SOCs by Roy, Surajit Kumar, Giri, Chandan, Rahaman, Hafizur

    Published in Journal of electronic testing (01-10-2016)
    “…Manufacturing of core based three-dimensional (3D) integrated circuit (IC) is an emerging field of semiconductor industry that promises greater number of…”
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    Journal Article
  13. 13

    Testing and Diagnosis of Digital Microfluidic Biochips using Multiple Droplets by Ghosh, Sourav, Roy, Surajit Kumar, Giri, Chandan

    Published in Journal of electronic testing (01-02-2021)
    “…Digital microfluidic biochip is a promising alternative to the traditional cumbersome laboratory equipment. Such automated biochips are used in many critical…”
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    Journal Article
  14. 14

    Optimisation of test architecture in three‐dimensional stacked integrated circuits for partial stack/complete stack using hard system‐on‐chips by Roy, Surajit Kumar, Giri, Chandan, Rahaman, Hafizur

    “…Three‐dimensional stacked integrated circuits (3D SICs) are currently evolving as an area of great interest in modern semiconductor industry. Several partial…”
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    Journal Article
  15. 15

    Identification of Faulty TSV with a Built-In Self-Test Mechanism by Maity, Dilip, Roy, Surajit, Giri, Chandan, Rahaman, Hafizur

    Published in 2018 IEEE 27th Asian Test Symposium (ATS) (01-10-2018)
    “…Three-dimensional Integrated Circuit (3D IC) based on through silicon via (TSV) has brought a drastic change in the IC technology. Since TSVs connect different…”
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    Conference Proceeding
  16. 16

    Identification of Faulty TSVs in 3D IC During Pre-Bond Testing by Maity, Dilip Kumar, Roy, Surajit Kumar, Giri, Chandan

    “…Manufacturing of three-dimensional (3D) integrated circuit (IC) using through-silicon vias (TSVs) passes through a complex process and testing of TSVs is a…”
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    Conference Proceeding
  17. 17

    Cost Effective Single Target Sample Preparation on Digital Microfluidic Biochip by Ghosh, Sourav, Roy, Surajit Kumar, Giri, Chandan

    “…In many healthcare-related application fields, such as point-of-care clinical diagnostics, high throughput sequencing, and proteomics, the recent emergence of…”
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    Conference Proceeding
  18. 18

    A Threshold based Hardware Trojan Detection Technique Using XGBoost Algorithm by Das, Ranit, Dhar, Tapobrata, Roy, Surajit Kumar

    “…The globalization of Integrated Circuit (IC) manu-facturing has made ICs vulnerable to Hardware Trojans (HT). This paper proposes a gate-level netlist HT…”
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    Conference Proceeding
  19. 19

    Wrapper design of embedded cores for three dimensional system-on-chips (SoC) using available TSVs by Roy, Surajit Kumar, Giri, Chandan, Ghosh, Sourav, Rahaman, Hafizur

    “…Core based three-dimensional(3D) integrated circuits (ICs) design is an emerging field of semiconductor industry that promises greater number of devices on…”
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    Conference Proceeding
  20. 20

    Hardware Trojan Detection Using Improved Testability Measures by Naskar, Priyanka, Dhar, Tapobrata, Roy, Surajit Kumar

    “…The globalised nature of design and manufacturing process of Integrated Circuits (ICs) makes them susceptible to malicious alterations called Hardware Trojan…”
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    Conference Proceeding