A 300 Mb/s BiCMOS EPR4 read channel for magnetic hard disks

This complete BiCMOS read channel IC in 0.8 /spl mu/m BiCMOS achieves 30O Mb/s maximum data rate. The majority of the signal processing in this IC is carried out in the analog sampled-data domain. The key circuit block in the channel is an 8-state time interleaved EPR4 Viterbi trellis detector. The...

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Bibliographic Details
Published in:1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156) pp. 378 - 379
Main Authors: Leung, M., Chiu, J., VanScheik, B., Wang, L., Fu, L., Rosky, D., Stoiber, S., Huntington, A., Liu, C., Loh, S.-C., Hsiung, C., Zhang, J., Fukahori, K., Hutchinson, D., Lee, T.-L.
Format: Conference Proceeding
Language:English
Published: IEEE 1998
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Summary:This complete BiCMOS read channel IC in 0.8 /spl mu/m BiCMOS achieves 30O Mb/s maximum data rate. The majority of the signal processing in this IC is carried out in the analog sampled-data domain. The key circuit block in the channel is an 8-state time interleaved EPR4 Viterbi trellis detector. The BER measurements show ideal performance gain over a PR4 channel.
ISBN:9780780343443
0780343441
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.1998.672542