Search Results - "Rohrer, N.J."

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  1. 1

    A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features by Rohrer, N.J., Lichtenau, C., Sandon, P.A., Kartschoke, P., Cohen, E., Canada, M.G., Pfluger, T., Ringler, M.I., Hilgendorf, R.B., Geissler, S., Zimmerman, J.S.

    Published in IEEE journal of solid-state circuits (01-01-2005)
    “…The first two members in a family of 64-bit superscalar microprocessors are presented. The 130-nm processor, which was introduced first, offers 5-way…”
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    Journal Article Conference Proceeding
  2. 2

    A 64B CPU Pair: Dual- and Single-Processor Chips by Cohen, E.B., Rohrer, N.J., Sandon, P., Canada, M., Lichtenau, C., Ringler, M., Kartschoke, P., Floyd, R., Heaslip, J., Ross, M., Pflueger, T., Hilgendorf, R., McCormick, P., Salem, G., Connor, J., Geissler, S., Thygesen, D.

    “…Two Powertrade-architecture 64b microprocessor chips are fabricated in 90nm dual strained-silicon SOI technology. The dual-processor chip has split clock…”
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    Conference Proceeding
  3. 3

    High Performance CMOS Variability in the 65nm Regime and Beyond by Nassif, S., Bernstein, K., Frank, D.J., Gattiker, A., Haensch, W., Ji, B.L., Nowak, E., Pearson, D., Rohrer, N.J.

    “…This paper has described the performance of CMOS and categorises the variability. The inability to scale the tolerance of multiple electrical parameters along…”
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    Conference Proceeding
  4. 4

    PowerPC 970 in 130 nm and 90 nm technologies by Rohrer, N.J., Canada, M., Cohen, E., Ringler, M., Mayfield, M., Sandon, P., Kartschoke, P., Heaslip, J., Allen, J., McCormick, P., Pfluger, T., Zimmerman, J., Lichtenau, C., Werner, T., Salem, G., Ross, M., Appenzeller, D., Thygesen, D.

    “…A 64 b PowerPC microprocessor is introduced in 130 nm and redesigned in 90 nm SOI technology. PowerPC 970 implements a SIMD instruction set with 512 kB L2…”
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    Conference Proceeding
  5. 5

    Technology Circuit Co-Design for High Performance Logic by Bernstein, K., Rohrer, N.J.

    “…Achieving maximum logic performance at minimum power consumption in deeply scaled CMOS technologies requires the cooperative design of technology, circuits,…”
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    Conference Proceeding
  6. 6

    Hybrid high temperature superconductor/GaAs 10 GHz microwave oscillator: temperature and bias effects by Rohrer, N.J., Valco, G.J., Bhasin, K.B.

    “…Hybrid YBa/sub 2/Cu/sub 3/O/sub 7-x/ superconductor/GaAs microwave oscillators have been designed, fabricated and characterized. The planar oscillators were…”
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    Journal Article
  7. 7

    A 10 GHz Y-Ba-Cu-O/GaAs hybrid oscillator proximity coupled to a circular microstrip patch antenna by Rohrer, N.J., Richard, M.A., Valco, G.J., Bhasin, K.B.

    “…A 10-GHz hybrid Y-Ba-Cu-O/GaAs microwave oscillator proximity coupled to a circular microstrip antenna has been designed, fabricated, and characterized. The…”
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    Journal Article
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