Search Results - "Ricardo P. Jasinski"

An Improved GF(2) Matrix Inverter with Linear Time Complexity by Jasinski, Ricardo P, Pedroni, Volnei A, Gortan, Antonio, Godoy, Walter

“…This paper presents a new hardware implementation for boolean matrix inverters. A circuit capable of inverting a nonsingular N×N matrix in exactly N clock…”
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Achieving near-MLD performance with soft information-set decoders implemented in FPGAs by Gortan, Antonio, Jasinski, Ricardo P, Godoy, Walter, Pedroni, Volnei A

“…This paper describes a design strategy that makes viable hardware implementations of Information-Set (IS)-based decoders with near-MLD performance. This is…”
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Panning sorter: A minimal-size architecture for hardware implementation of 2D Data Sorting Coprocessors by Pedroni, V A, Jasinski, R P, Pedroni, R U

“…This paper describes the Panning Sorter (PanS), a new architecture for hardware implementation of compact, fast, low power data sorters operating with parallel…”
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Analysis and Preliminary Measurements of Radiated Emissions in an Asynchronous Circuit versus its Synchronous Counterpart by de Cristo, R A L, Jasinski, R P, Pedroni, V A

“…As circuits grow larger and faster, electromagnetic interference (EMI) plays an increasingly important role in equipment design. To deal with EMI and make…”
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Requisitos para adocao de sistemas operacionals embarcados by Maiko R. Moroz, Ricardo P. Jasinski, Volnei A. Pedroni

“…Embedded systems are part of numerous applications, most of whichinclude real-time or specialized operating systems. The operating systemmust be chosen taking…”
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A very efficient single-iteration oldest-out data sorter by Pedroni, Volnei A., Jasinski, Ricardo P., Pedroni, Ricardo U.

“…This work introduces a new hardware implementation for oldest-out sorters. The circuit operates serially and reorders the data in a single clock cycle,…”
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Método para la evaluación de un microcontrolador de núcleo abierto by Christophe F. L. Bricout, Sibilla B. Luz, Ricardo P. Jasinski, Volnei A. Pedroni

“…La etapa de verificación desempeña un papel fundamental en el diseño e implementación de microcontroladores. Con el fin de realizar una verificación acertada…”
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Method for assessment of an 8-bit open core microcontroller by Pedroni, Volnei A, Jasinski, Ricardo P, Bricout, Christophe F. L, Luz, Sibilla B

“…La etapa de verifi cación desempeña un papel fundamental en el diseñoe implementación de microcontroladores. Con el fi n de realizar una verificación acertada…”
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A new hardware coprocessor for accelerating Notification-Oriented applications by Peters, E., Jasinski, R. P., Pedroni, V. A., Simao, J. M.

“…This paper presents a new hardware coprocessor to accelerate applications developed using the Notification-Oriented Paradigm (NOP). A NOP application presents…”
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The impact of operating system adoption in an embedded project: A case study by Jasinski, R. P., Moroz, M. R., Pedroni, V. A.

“…The use of an operating system (OS) is advocated as a means to simplify software development, freeing programmers from managing low-level hardware and…”
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Taking advantage of LVDS input buffers to implement sigma-delta A/D converters in FPGAs by SOUSA, Fabio, MAUER, Volker, DUARTE, Neimar, JASINSKI, Ricardo P, PEDRONI, Volnei A

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