Search Results - "Ram, Mamidala Saketh"

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  1. 1

    Low-frequency Noise in Vertical InAs/InGaAs Gate-all-around MOSFETs at 15 K for Cryogenic Applications by Ram, Mamidala Saketh, Svensson, Johannes, Skog, Sebastian, Johannesson, Sofie, Wernersson, Lars-Erik

    Published in IEEE electron device letters (01-12-2022)
    “…Low-frequency noise (LFN), or 1/ f -noise, can be used effectively to evaluate device reliability which is a major concern in analog as well as digital…”
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    Journal Article
  2. 2

    Tuning oxygen vacancies and resistive switching properties in ultra-thin HfO2 RRAM via TiN bottom electrode and interface engineering by Yong, Zhihua, Persson, Karl-Magnus, Saketh Ram, Mamidala, D'Acunto, Giulio, Liu, Yi, Benter, Sandra, Pan, Jisheng, Li, Zheshen, Borg, Mattias, Mikkelsen, Anders, Wernersson, Lars-Erik, Timm, Rainer

    Published in Applied surface science (15-06-2021)
    “…[Display omitted] •Two OxRRAM stacks -TiN bottom metal electrode were fabricated by PVD and ALD.•The HfOx layer in HfOx/PVD-TiN is found to be more oxygen…”
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    Journal Article
  3. 3

    Effects of Interface Oxidation on Noise Properties and Performance in III–V Vertical Nanowire Memristors by Saketh Ram, Mamidala, Svensson, Johannes, Wernersson, Lars-Erik

    Published in ACS applied materials & interfaces (19-04-2023)
    “…Memristors implemented as resistive random-access memories (RRAMs) owing to their low power consumption, scalability, and speed are promising candidates for…”
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    Journal Article
  4. 4

    Low-Power Resistive Memory Integrated on III-V Vertical Nanowire MOSFETs on Silicon by Ram, Mamidala Saketh, Persson, Karl-Magnus, Borg, Mattias, Wernersson, Lars-Erik

    Published in IEEE electron device letters (01-09-2020)
    “…III-V vertical nanowire MOSFETs (VNW-FETs) have the potential to extend Moore's law owing to their excellent material properties. To integrate highly scaled…”
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    Journal Article
  5. 5

    Performance, Analysis, and Modeling of III-V Vertical Nanowire MOSFETs on Si at Higher Voltages by Andric, Stefan, Kilpi, Olli-Pekka, Ram, Mamidala Saketh, Svensson, Johannes, Lind, Erik, Wernersson, Lars-Erik

    Published in IEEE transactions on electron devices (01-06-2022)
    “…Heterostructure engineering in III-V vertical nanowire (VNW) MOSFETs enables tuning of transconductance and breakdown voltage. In this work, an In x…”
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    Journal Article
  6. 6

    Ultra-Scaled AlOx Diffusion Barriers for Multibit HfOx RRAM Operation by Persson, Karl-Magnus, Ram, Mamidala Saketh, Wernersson, Lars-Erik

    “…For dense very large scale integration (VLSI) of high performance, multibit resistive memory (RRAM), scalability of material dimensions, as well as the…”
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    Journal Article
  7. 7

    Cross‐Point Arrays with Low‐Power ITO‐HfO2 Resistive Memory Cells Integrated on Vertical III‐V Nanowires by Persson, Karl‐Magnus, Ram, Mamidala Saketh, Kilpi, Olli‐Pekka, Borg, Mattias, Wernersson, Lars‐Erik

    Published in Advanced electronic materials (01-06-2020)
    “…Vertical nanowires with cointegrated metal‐oxide‐semiconductor field‐effect‐transistor (MOSFET) selectors and nonvolatile resistive random access memory (RRAM)…”
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    Journal Article
  8. 8

    Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs by Rangasamy, Gautham, Ram, Mamidala Saketh, Fhager, Lars Ohlsson, Wernersson, Lars-Erik

    Published in IEEE electron device letters (01-07-2023)
    “…We investigate self-heating in vertical, gate-all-around III-V InAs/InGaAs nanowire MOSFETs using pulsed IV measurements at various temperatures. Low…”
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    Journal Article
  9. 9

    Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs With a Field Plate by Kilpi, Olli-Pekka, Andric, Stefan, Svensson, Johannes, Ram, Mamidala Saketh, Lind, Erik, Wernersson, Lars-Erik

    Published in IEEE electron device letters (01-11-2021)
    “…Vertical III-V heterostructure MOSFETs exhibit outstanding performance at reduced supply voltages. In this letter, we report on a novel process of extending…”
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    Journal Article
  10. 10

    Submicrometer Top-Gate Self-Aligned a-IGZO TFTs by Substrate Conformal Imprint Lithography by Ram, Mamidala Saketh, De Kort, Laura, De Riet, Joris, Verbeek, Roy, Bel, Thijs, Gelinck, Gerwin, Kronemeijer, Auke Jisk

    Published in IEEE transactions on electron devices (01-04-2019)
    “…Thin-film transistors (TFTs) are the fundamental building blocks of today's display industry. To achieve higher drive currents and device density, it is…”
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    Journal Article
  11. 11

    High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon by Ram, Mamidala Saketh, Persson, Karl-Magnus, Irish, Austin, Jönsson, Adam, Timm, Rainer, Wernersson, Lars-Erik

    Published in Nature electronics (21-12-2021)
    “…In-memory computing can be used to overcome the von Neumann bottleneck—the need to shuffle data between separate memory and computational units—and help…”
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    Journal Article
  12. 12

    Single Grain Boundary Tunnel Field Effect Transistors on Recrystallized Polycrystalline Silicon: Proposal and Investigation by Ram, Mamidala Saketh, Abdi, Dawit Burusie

    Published in IEEE electron device letters (01-10-2014)
    “…A single grain boundary tunnel field effect transistor (TFET) on recrystallized polycrystalline silicon is reported in this letter. By varying the position of…”
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    Journal Article
  13. 13

    Controlling Filament Stability in Scaled Oxides (3 nm) for High Endurance (>106) Low Voltage ITO/HfO2 RRAMs for Future 3D Integration by Ram, Mamidala Saketh, Persson, Karl-Magnus, Wernersson, Lars-Erik

    Published in 2021 Device Research Conference (DRC) (20-06-2021)
    “…Non-volatile resistive-random-access-memories (RRAMs), which are highly scalable, cost-efficient and fast, are needed to meet the future computational needs…”
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    Conference Proceeding
  14. 14

    The Effect of Deposition Conditions on Heterointerface‐Driven Band Alignment and Resistive Switching Properties by Yong, Zhihua, Ram, Mamidala Saketh, Persson, Karl‐Magnus, Subramanian, Gomathy Sandhya, Wernersson, Lars‐Erik, Pan, Jisheng

    Published in Advanced electronic materials (01-11-2022)
    “…Titanium nitride and hafnium oxide stack have been widely used in various resistive memory elements since the materials are…”
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    Journal Article
  15. 15

    Single Grain Boundary Dopingless PNPN Tunnel FET on Recrystallized Polysilicon: Proposal and Theoretical Analysis by Ram, Mamidala Saketh, Abdi, Dawit Burusie

    “…A single grain boundary dopingless PNPN tunnel field effect transistor (TFET) on recrystallized polycrystalline silicon is studied by varying the position of…”
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    Journal Article
  16. 16

    Performance Investigation of Single Grain Boundary Junctionless Field Effect Transistor by Ram, Mamidala Saketh, Abdi, Dawit Burusie

    “…In this paper, we report a single grain boundary (GB) junctionless thin film transistor (JLFET) on recrystallized polycrystalline silicon (poly-Si JLFET)…”
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    Journal Article
  17. 17

    Investigation of Reverse Filament Formation in ITO/HfO2-based RRAM by Persson, Karl-Magnus, Ram, Mamidala Saketh, Borg, Mattias, Wernersson, Lars-Erik

    Published in 2019 Device Research Conference (DRC) (01-06-2019)
    “…To overcome the large discrepancy in speed between computational devices and that of contemporary large capacity non-volatile memory (NVM) technologies,…”
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    Conference Proceeding
  18. 18

    A 4F2 Vertical Gate-all-around Nanowire Compute-in-memory Device Integrated in (1T1R) Cross-Point Arrays on Silicon by Ram, Mamidala Saketh, Persson, Karl-Magnus, Wernersson, Lars-Erik

    “…Complete 4F2 vertical nanowire (VNW) 1T1R cells with 10 6 cycles switching endurance and with a demonstrated capability of performing Boolean logic are…”
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    Conference Proceeding
  19. 19
  20. 20

    Read Noise Analysis in Analog Conductive-Metal-Oxide/HfOx ReRAM Devices by Lombardo, Davide G. F., Ram, Mamidala Saketh, Stecconi, Tommaso, Choi, Wooseok, Porta, Antonio La, Falcone, Donato F., Offrein, Bert, Bragaglia, Valeria

    Published in 2024 Device Research Conference (DRC) (24-06-2024)
    “…Analog in-memory computing with resistive memory devices is a compelling alternative to conventional digital von Neumann computers [1]. Recent advancements in…”
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    Conference Proceeding