Search Results - "Raga Sudha Garimella, Sri"
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1
Novel 3D Monotonic Characterization of Standard Cell Liberty File Attributes w.r.t ASIC Tool Flow
Published in 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) (01-08-2019)“…Shrinking of process nodes is declining and demand is increasing for design perfection to optimize power, performance, area (PPA). Standard library cells (STD…”
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Conference Proceeding -
2
Novel 3D Monotonic Characterization of Standard Cell Liberty File Attributes w.r.t ASIC Tool Flow
Published in 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) (01-08-2018)“…Shrinking of process nodes is declining and demand is increasing for design perfection to optimize power, performance and area (PPA). Standard library cells…”
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Conference Proceeding -
3
Highly Linear Wide Dynamic Swing CMOS Transconductance Multiplier Using Source-Degeneration V-I Converters
Published in 21st International Conference on VLSI Design (VLSID 2008) (01-01-2008)“…A novel compact four quadrant CMOS transconductance analog multiplier with wide dynamic swing and wide gain bandwidth product using source- degeneration V-I…”
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Conference Proceeding -
4
Design of highly linear multipliers using floating gate transistors and/or source degeneration resistor
Published in 2008 IEEE International Symposium on Circuits and Systems (01-01-2008)“…Compact schemes to implement two highly linear four quadrant CMOS transconductance multipliers are presented in this work. They are based on floating gate…”
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Conference Proceeding Journal Article -
5
Low depth carry look ahead circuits using rail-to-rail capacitive threshold logic
Published in 2008 51st Midwest Symposium on Circuits and Systems (01-08-2008)“…Compact low depth carry look-ahead circuits using rail-to-rail capacitive threshold logic are proposed. Experimental results of a fabricated test chip from…”
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Conference Proceeding -
6
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators
Published in 21st International Conference on VLSI Design (VLSID 2008) (01-01-2008)“…A rail-to-rail differential input stage with programmable threshold levels and offset compensation is introduced. Applications for the implementation of…”
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Conference Proceeding -
7
New Gain Programmable Current Mirrors Based on Current Steering
Published in 2006 49th IEEE International Midwest Symposium on Circuits and Systems (01-08-2006)“…A new compact scheme for implementation of linear gain programmable current mirrors with wide range continuously adjustable gain is introduced. It is based on…”
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Conference Proceeding