Search Results - "Preusser, Thomas B."

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  1. 1

    Inference of quantized neural networks on heterogeneous all-programmable devices by Preuser, Thomas B., Gambardella, Giulio, Fraser, Nicholas, Blott, Michaela

    “…Neural networks have established as a generic and powerful means to approach challenging problems such as image classification, object detection or decision…”
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    Conference Proceeding
  2. 2

    Understanding and Fixing Complex Faults in Embedded Cyberphysical Systems by Weiss, Alexander, Gautham, Smitha, Jayakumar, Athira Varma, Elks, Carl R., Kuhn, D. Richard, Kacker, Raghu N., Preusser, Thomas B.

    Published in Computer (Long Beach, Calif.) (01-01-2021)
    “…Embedded systems are becoming ubiquitous companions in all our lives. This article reviews the terminology and modern understanding of complex anomalies and…”
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    Journal Article
  3. 3

    Putting Queens in Carry Chains, N o̱27 by Preußer, Thomas B., Engelhardt, Matthias R.

    Published in Journal of signal processing systems (01-08-2017)
    “…The N-Queens Puzzle is a fascinating combinatorial problem. Up to now, the number of distinct valid placements of N non-attacking queens on a generalized N × N…”
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    Journal Article
  4. 4

    Accelerating Computations on FPGA Carry Chains by Operand Compaction by Preusser, Thomas B., Zabel, M., Spallek, R. G.

    “…This work describes the carry-compact addition (CCA), a novel addition scheme that allows the acceleration of carry-chain computations on contemporary FPGA…”
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    Conference Proceeding
  5. 5

    Ready PCIe data streaming solutions for FPGAs by Preusser, Thomas B., Spallek, Rainer G.

    “…The PCIe attachment of FPGA accelerators within host workstations is convenient and offers a high-performance direct integration. FPGA-boards designed and…”
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    Conference Proceeding
  6. 6

    Design Kernel Exploration Using QBF-Based Boolean Matching by PreuBer, Thomas B., Erxleben, Fredo

    “…The synthesis and mapping of user designs to configurable hardware is typically performed by heuristics. These approaches analyze the decomposability of the…”
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    Conference Proceeding
  7. 7

    Everything You Always Wanted to Know About Embedded Trace by Preuser, Thomas B., Gautham, Smitha, Rajagopala, Abhi D., Elks, Carl R., Weiss, Alexander

    Published in Computer (Long Beach, Calif.) (01-02-2022)
    “…Decades of advances in computer architecture, software-intensive applications, and system integration have created significant challenges for embedded systems…”
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    Journal Article
  8. 8

    An LZ77-style bit-level compression for trace data compaction by Kai-Uwe Irrgang, Preusser, Thomas B.

    “…Online tracing is a powerful technique for monitoring and debugging embedded processors. The amount of data produced by tracing is enormous. Thus, an…”
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    Conference Proceeding
  9. 9

    Putting Queens in Carry Chains, No̱27 by Preußer, Thomas B., Engelhardt, Matthias R.

    “…The N -Queens Puzzle is a fascinating combinatorial problem. Up to now, the number of distinct valid placements of N non-attacking queens on a generalized N ×…”
    Get full text
    Journal Article
  10. 10

    PoC-align: An open-source alignment accelerator using FPGAs by Preuber, Thomas B., Knodel, Oliver, Spallek, Rainer G.

    “…The mapping of reads, i.e. short DNA base pair strings, to large genome databases has become a critical operation for genetic analysis and diagnosis. The…”
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    Conference Proceeding
  11. 11

    FPGA-Specific Arithmetic Optimizations of Short-Latency Adders by Hong Diep Nguyen, Pasca, B., Preusser, Thomas B.

    “…Integer addition is a pervasive operation in FPGA designs. The need for fast wide adders grows with the demand for large precisions as, for example, required…”
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    Conference Proceeding
  12. 12

    Next-generation massively parallel short-read mapping on FPGAs by Knodel, O., Preusser, T. B., Spallek, R. G.

    “…The mapping of DNA sequences to huge genome databases is an essential analysis task in modern molecular biology. Having linearized reference genomes available,…”
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    Conference Proceeding
  13. 13

    Short-Read Mapping by a Systolic Custom FPGA Computation by Preusser, T. B., Knodel, O., Spallek, R. G.

    “…The mapping of reads, i.e. short DNA base pair strings, to large genome databases has become a critical operation for genetic analysis and diagnosis. Although…”
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    Conference Proceeding
  14. 14

    Weasel: A platform-independent streaming-optimized SATA controller by Lehmann, Patrick, Frank, Thomas, Knodel, Oliver, Kohler, Steffen, Preuser, Thomas B., Spallek, Rainer G.

    “…Field-Programmable Gate Arrays, which are widely used as prototyping platforms, are intruding the domain of custom-specific high-performance hardware…”
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    Conference Proceeding
  15. 15

    Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture by Zabel, Martin, Preusser, T.B., Reichel, Peter, Spallek, Rainer G.

    “…This paper presents a novel implementation of an embedded Java microarchitecture for secure, real-time, and multi-threaded applications. A general-purpose…”
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    Conference Proceeding
  16. 16

    Mapping basic prefix computations to fast carry-chain structures by Preusser, T.B., Spallek, R.G.

    “…Carry chains are a standard feature of modern FPGA architectures. They enable compact, regular and yet very fast implementations of the binary word addition…”
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    Conference Proceeding
  17. 17

    Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic by Blott, Michaela, PreuBer, Thomas B., Fraser, Nicholas, Gambardella, Giulio, O'Brien, Kenneth, Umuroglu, Yaman, Leeser, Miriam

    “…Convolutional Neural Networks have dramatically improved in recent years, surpassing human accuracy on certain problems and performance exceeding that of…”
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    Conference Proceeding
  18. 18

    Analysis of a Fully-Scalable Digital Fractional Clock Divider by Preuber, Thomas B., Spallek, Rainer G.

    “…It was previously shown [5] that the BRESENHAM algorithm [2] is well-suited for digital fractional clock generation. Specifically, it proved to be the optimal…”
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    Conference Proceeding
  19. 19

    Generic and Universal Parallel Matrix Summation with a Flexible Compression Goal for Xilinx FPGAs by Preußer, Thomas B

    Published 21-06-2018
    “…Bit matrix compression is a highly relevant operation in computer arithmetic. Essentially being a multi-operand addition, it is the key operation behind fast…”
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    Journal Article
  20. 20

    QBM - Mapping User-Specified Functions to Programmable Logic through a QBF Satisfiability Problem by Preußer, Thomas B

    Published 06-01-2018
    “…This is a brief overview on the background behind the test set formulas generated by the QBM tool. After establishing its application context, its formal…”
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    Journal Article