Search Results - "Prasad, B M Prabhu"

Object Detection and Classification Framework for Analysis of Video Data Acquired from Indian Roads by Padia, Aayushi, T N, Aryan, Thummagunti, Sharan, Sharma, Vivaan, K Vanahalli, Manjunath, B M, Prabhu Prasad, G N, Girish, Kim, Yong-Guk, B N, Pavan Kumar

“…Object detection and classification in autonomous vehicles are crucial for ensuring safe and efficient navigation through complex environments. This paper…”
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An Efficient FPGA-Based Network-on-Chip Simulation Framework Utilizing the Hard Blocks by Prabhu Prasad, B. M., Parane, Khyamling, Talawar, Basavaraj

“…In multi-processor system-on-chips, on-chip interconnection plays a significant role. The type of on-chip architecture being used in an application decides the…”
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QACM: Quality Aware Crowd Sensing in Mobile Computing by Thippeswamy, B. M., Ghouse, Mohamed, Ahmed Jafarabad, Shanawaz, Khan Mohammed, Murtuza Ahamed, Adere, Ketema, B. M., Prabhu Prasad, B. N., Pavan Kumar

“…Mobile computing is one of the significant opportunities that can be used for various practical applications in numerous fields in real life. Due to inherent…”
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YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Using FPGAs by Prabhu Prasad B M, Parane, Khyamling, Talawar, Basavaraj

“…In this paper, we present an FPGA based NoC simulation framework, YaNoC, that supports the creation of standard and custom topologies, design of routing…”
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FPGA friendly NoC simulation acceleration framework employing the hard blocks by Prasad, B. M. Prabhu, Parane, Khyamling, Talawar, Basavaraj

“…A major role is played by Modeling and Simulation platforms in development of a new Network-on-Chip (NoC) architecture. The cycle accurate software simulators…”
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P-NoC: Performance Evaluation and Design Space Exploration of NoCs for Chip Multiprocessor Architecture Using FPGA by Parane, Khyamling, Prabhu Prasad, B. M., Talawar, Basavaraj

“…The network-on-chip (NoC) has emerged as an efficient and scalable communication fabric for chip multiprocessors (CMPs) and multiprocessor system on chips…”
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A Comprehensive Review of Leap Motion Controller-Based Hand Gesture Datasets by Chakravarthi, Bharatesh, M, Prabhu Prasad B, Imandi, Raju, N, Pavan Kumar B

“…This paper comprehensively reviews hand gesture datasets based on Ultraleap's leap motion controller, a popular device for capturing and tracking hand gestures…”
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Analysis of cache behaviour and software optimizations for faster on-chip network simulations by Prasad, B. M. Prabhu, Parane, Khyamling, Talawar, Basavaraj

“…Fast simulations are critical in reducing time to market in chip multiprocessors and system-on-chips. Several simulators have been used to evaluate the…”
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Design of an Adaptive and Reliable Network on Chip Router Architecture Using FPGA by Parane, Khyamling, Prabhu Prasad, B. M, Talawar, Basavaraj

“…We propose an adaptive, low cost, reliable and high performance router implemented based on a conventional two stage pipeline. The proposed Adaptive routing…”
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High-Performance NoC Simulation Acceleration Framework Employing the Xilinx DSP48E1 Blocks by Prabhu Prasad, B M, Parane, Khyamling, Talawar, Basavaraj

“…An FPGA based Network on Chip (NoC) simulation acceleration framework is presented in this paper. The functionality of the crossbar switch of the NoC router is…”
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A Comprehensive Review of Leap Motion Controller-based Hand Gesture Datasets by Chakravarthi, Bharatesh, M, Prabhu Prasad B, N, Pavan Kumar B

“…This paper comprehensively reviews hand gesture datasets based on Ultraleap's leap motion controller, a popular device for capturing and tracking hand gestures…”
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Hy-BTree: An efficient Tree based topology for FPGA based NoC implementation by Prabhu Prasad, B M, Parane, Khyamling, Talawar, Basavaraj

“…Due to their hierarchical structure, Binary Tree (BTree) topology can be employed in Network-on-Chip (NoC) applications. Because of its lower bisection…”
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Kinect Sensor-Based Indoor 3D Reconstruction - A Pilot Study by S, Amruth Mandappa T, N, Pavan Kumar B, Chakravarthi, Bharatesh, V, Manjunath K, N, Girish G, M, Prabhu Prasad B

“…This study investigates the application of a low-cost Kinect sensor for 3D reconstruction inside. The project uses structured light technologies and the Kinect…”
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Cache analysis and software optimizations for faster on-chip network simulations by Parane, Khyamling, Prasad, B.M. Prabhu, Talawar, Basavaraj

“…Fast simulations are critical in reducing time to market in CMPs and SoCs. Several simulators have been used to evaluate the performance and power consumed by…”
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HydroStack: A Hybrid Meta-Ensemble Machine Learning Framework for Accurate Annual Rainfall Prediction by Shetty, Shashank, Dhanyashree, Dharmendra, Diya, Bankapur, Sanjay, M, Prabhu Prasad B

“…With increasing environmental awareness and the growing severity of climate challenges, the need for accurate rainfall prediction has become more essential…”
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Real-time Human Motion Tracking and Reconstruction using IMU Sensors by Chakravarthi, Bharatesh, Prabhu Prasad, B M, Chethana, B, Pavan Kumar, B N

“…Human body-strap-based, and sensor-mounted clothing-based easy-to-wear motion capture systems have generated a lot of interest and been thoroughly investigated…”
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Pilot DroneUI: An User Interface to Control UAV using Robot Operating System by Thippeswamy, B M, Ghouse, Mohammed, Deksiso, Adugna, Prasad, B M Prabhu, Pramod, T C, Kumar, B N Pavan

“…This paper presents ongoing research work on developing a Graphical User Interface (GUI) to control drones using the Robot Operating System (ROS) and Qt…”
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High-Performance NoCs Employing the DSP48E1 Blocks of the Xilinx FPGAs by B.M., Prabhu Prasad, Parane, Khyamling, Talawar, Basavaraj

“…The hard multiplexers of the Xilinx DSP48E1 slices have been employed to support the functionality of crossbar switch of the buffered five port Network-on-Chip…”
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FPGA based NoC Simulation Acceleration Framework Supporting Adaptive Routing by Parane, Khyamling, B.M., Prasad Prabhu, Talawar, and Basavaraj

“…In this paper, we present fast and parameterized FPGA based Network-on-Chip (NoC) simulation acceleration framework with automated HDL generation engine. The…”
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