Search Results - "Prabakar, T. N."

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  1. 1

    A novel method to improve computational and classification performance of rice plant disease identification by Archana, K. S., Srinivasan, S., Bharathi, S. Prasanna, Balamurugan, R., Prabakar, T. N., Britto, A. Sagai Francis

    Published in The Journal of supercomputing (2022)
    “…Rice is a major food crop that plays an important role in the Indian economy. It is the most consumed staple food, greatly in demand in the market to meet the…”
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    Journal Article
  2. 2
  3. 3

    Design and FPGA implementation of binary squarer using Vedic mathematics by Sriraman, L., Kumar, K. Saravana, Prabakar, T. N.

    “…In this paper, a squarer based on Vedic mathematics is proposed. Vedic mathematics is one of the ancient Indian mathematics which contains sixteen sutras…”
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    Conference Proceeding
  4. 4

    Multiplexer based two variables DAA by Sriraman, L., Prabakar, T. N.

    “…In this paper, novel hardware architecture for performing point, line and edge detection using DAA is proposed. Such manipulations are vital in digital image…”
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    Conference Proceeding
  5. 5

    Intellectual transport system for human safety using machine learning approach by Aanandha Saravanan, K., Ramkumar, S., Revathy, M., Mohanthi, K., Prabakar, T.N., Venugopal, Raja, G.V.

    Published in Measurement. Sensors (01-12-2022)
    “…Generally, it is projected that a combination of automated and manually vehicles would be core of the intellectual transportation scheme. As a result,…”
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    Journal Article
  6. 6

    Multimodal biometric recognition using iris feature extraction and palmprint features by Hariprasath, S., Prabakar, T. N.

    “…A Biometric system is essentially a pattern recognition system that makes use of biometric traits to recognize individuals. Authentication systems built on…”
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    Conference Proceeding
  7. 7

    A pipelined approach for FPGA implementation of multi modal biometric pattern recognition using prototype based supervised neural network by Hariprasath, S., Prabakar, T. N.

    “…A Biometric system is essentially a pattern recognition system that makes use of biometric traits to recognize individuals. Authentication systems built on…”
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    Conference Proceeding
  8. 8

    Design and implementation of two variable multiplier using KCM and Vedic Mathematics by Sriraman, L., Prabakar, T. N.

    “…In this paper, a novel multiplier architecture based on ROM approach using Vedic Mathematics is proposed. This multiplier's architecture is similar to that of…”
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    Conference Proceeding
  9. 9

    FPGA implementation of multilayer feed forward neural network architecture using VHDL by Hariprasath, S., Prabakar, T. N.

    “…This paper presents a hardware implementation of multilayer feed forward neural networks (FFNN) using Field Programmable gate arrays (FPGAs). In spite of huge…”
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    Conference Proceeding
  10. 10

    FPGA based real time face detection using Adaboost and histogram equalization by Padmaja, K., Prabakar, T. N.

    “…This paper introduces a novel technique to detect faces in real-time with very high detection rate. It is essentially a feature-based approach, in which a…”
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    Conference Proceeding
  11. 11

    Design of R3TOS based reliable low power network on chip by Poornima, N., Gopalakrishnan, Seetharaman, Arsalan, Tughrul, Prabakar, T. N., Santhi, M.

    “…In this paper, design of a novel Network on Chip (NoC) structure and its integration with Reliable Reconfigurable Real Time Operating System (R3TOS) are…”
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    Conference Proceeding
  12. 12

    Design of reconfigurable and reliable application specific network on chip for R3TOS by Poornima, N, Gopalakrishnan, Seetharaman, Tughrul, Arslan, Prabakar, T. N., Sarkar, Saurav, Santhi, M

    “…In this paper, design of a novel reliable Application Specific Network on Chip (ASNoC) with reconfigurability and its integration with Reliable Reconfigurable…”
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    Conference Proceeding
  13. 13

    Design of Low Power TPG Using LP-LFSR by Kavitha, A., Seetharaman, G., Prabakar, T. N., Shrinithi, S.

    “…This paper presents a novel test pattern generator which is more suitable for built in self test (BIST) structures used for testing of VLSI circuits. The…”
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    Conference Proceeding
  14. 14

    A Modified Algorithm for Removal of Salt and Pepper Noise in Color Images by Adhinarayanan, V., Sheebha, S. P., Sriraman, L., Prabakar, T. N., Seetharaman, G.

    “…In this paper a modified simple edge preserved denoising algorithm to remove salt and pepper noise in digital color images is presented. The algorithm has…”
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    Conference Proceeding
  15. 15

    Implementation of Hybrid Wave-pipelined 2D DWT Using ASIC by Adhinarayanan, V., Paramasivam, R., Gopalakrishnan, S., Prabakar, T. N.

    “…In the literature, pipelined systems require clock routing complexity and clock skews between different parts of the system. A circuit design technique such as…”
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    Conference Proceeding
  16. 16

    On-Board Verification of FPGA Based Digital Systems using NIOS Processor (A Methodology Without Hook-Ups and I/O Cards) by Lakshminarayanan, G., Prabakar, T.N.

    “…A novel methodology for testing all digital systems fused onto the FPGA has been developed in this paper. This methodology does not require any hook-up and…”
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    Conference Proceeding
  17. 17

    FPGA based asynchronous pipelined multiplier with intelligent delay controller by Prabakar, T.N., Lakshminarayanan, G., Anilkumar, K.K.

    Published in 2008 International SoC Design Conference (01-11-2008)
    “…In this paper, a novel scheme is proposed for the implementation of FPGA based digital systems using asynchronous pipelining technique. To control the…”
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    Conference Proceeding
  18. 18

    Design and implementation of pipelined MB-OFDM UWB transmitter backend modules on FPGA by Santhi, M., Kumar, M.S., Lakshminarayanan, G., Prabakar, T.N.

    “…In this paper, novel ideas have been proposed for designing and implementing the pipelined MB-OFDM UWB transmitter Digital Backend Modules on FPGA for a data…”
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    Conference Proceeding
  19. 19

    Real time cryptography with dual key encryption by Lakshmi, B., Prabakar, T.N., Kirubakaran, E.

    “…This paper presents a method of encryption that enhances the security of vital data against brute force attack. The method is based on dual key encryption in…”
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    Conference Proceeding
  20. 20

    SOPC Based Asynchronous Pipelined DCT with Self Test Capability by Prabakar, T.N., Lakshminarayanan, G., Anilkumar, K.K.

    “…Asynchronous pipelined circuits have many potential advantages over their synchronous equivalents including lower power consumption, design reuse without…”
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    Conference Proceeding