Search Results - "Pomeranz, I."

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  1. 1

    Generation of Functional Broadside Tests for Transition Faults by Pomeranz, I., Reddy, S.M.

    “…Scan design allows a circuit to be tested using states that the circuit cannot enter during functional operation. It was observed that nonfunctional operation…”
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    Journal Article
  2. 2

    Primary Input Vectors to Avoid in Random Test Sequences for Synchronous Sequential Circuits by Pomeranz, I., Reddy, S.M.

    “…Random test sequences may be used for manufacturing testing as well as for simulation-based design verification. This paper studies one of the reasons for the…”
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  3. 3

    Techniques for minimizing power dissipation in scan and combinational circuits during test application by Dabholkar, V., Chakravarty, S., Pomeranz, I., Reddy, S.

    “…Reduction of power dissipation during test application is studied for scan designs and for combinational circuits tested using built-in self-test (BIST). The…”
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  4. 4

    A measure of quality for n-detection test sets by Pomeranz, I., Reddy, S.M.

    Published in IEEE transactions on computers (01-11-2004)
    “…N-detection test sets are useful in improving the coverage of unmodeled faults. We introduce a measure of quality that allows us to compare two test sets in…”
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  5. 5

    Transition Path Delay Faults: A New Path Delay Fault Model for Small and Large Delay Defects by Pomeranz, I., Reddy, S.M.

    “…We propose a new path delay fault model called the transition path delay fault model. This model addresses the following issue. The path delay fault model…”
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  6. 6

    Unspecified Transition Faults: A Transition Fault Model for At-Speed Fault Simulation and Test Generation by Pomeranz, I., Reddy, S.M.

    “…A transition fault model is described, which is easy to simulate under test sequences that are applied at-speed, and provides a target for the generation of…”
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  7. 7

    Invariant States and Redundant Logic in Synchronous Sequential Circuits by Pomeranz, I.

    “…The concept of invariant states of synchronous sequential circuits is defined. An invariant state is incompletely specified (i.e., it is a cube), and its…”
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  8. 8

    Forward-Looking Reverse Order Fault Simulation for n -Detection Test Sets by Pomeranz, I., Reddy, S.M.

    “…We extend the concept of forward-looking reverse order fault simulation to n -detection test sets. Forward-looking reverse order fault simulation is an…”
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  9. 9

    Double-Single Stuck-at Faults: A Delay Fault Model for Synchronous Sequential Circuits by Pomeranz, I., Reddy, S.M.

    “…In this paper, we describe a new transition fault model for synchronous sequential circuits. Similar to previous models, it addresses the fact that delayed…”
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  10. 10

    Methotrexate in chronic active ulcerative colitis: A double-blind, randomized, Israeli multicenter trial by Oren, R, Arber, N, Odes, S, Moshkowitz, M, Keter, D, Pomeranz, I, Ron, Y, Reisfeld, I, Broide, E, Lavy, A, Fich, A, Eliakim, R, Patz, J, Bardan, E, Villa, Y, Gilat, T

    Published in Gastroenterology (New York, N.Y. 1943) (01-05-1996)
    “…BACKGROUND & AIMS: Uncontrolled studies have suggested that methotrexate may be effective in patients with active ulcerative colitis. The aim of this study was…”
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    Journal Article
  11. 11

    Functional Broadside Tests Under an Expanded Definition of Functional Operation Conditions by Pomeranz, I., Reddy, S.M.

    “…The functional operation of a synchronous sequential circuit is defined to start after the circuit is initialized to a known state, typically by a…”
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  12. 12

    Reducing test-data volume using P-testable scan chains in circuits with multiple scan chains by Pomeranz, I.

    “…For a scan design with multiple scan chains, we say that a scan chain is P-testable if it is possible to achieve complete fault coverage for the circuit (i.e.,…”
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  13. 13

    Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits by Kajihara, S., Pomeranz, I., Kinoshita, K., Reddy, S.M.

    “…This paper presents new cost-effective heuristics for the generation of minimal test sets. Both dynamic techniques, which are introduced into the test…”
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  14. 14

    Generation of Broadside Transition-Fault Test Sets That Detect Four-Way Bridging Faults by Pomeranz, I., Reddy, S.M.

    “…Generation of n-detection test sets is typically done for a single fault model. This paper investigates the generation of n-detection test sets by pairing each…”
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  15. 15

    Nonspecific esophageal motility disorders may be an early stage of a specific disorder, particularly achalasia by Naftali, T., Levit, T., Pomeranz, I., Benjaminov, F. S., Konikoff, F. M.

    Published in Diseases of the esophagus (01-10-2009)
    “…SUMMARY The clinical significance of nonspecific esophageal motility disorder (NEMD) is unclear. Our aim was to investigate the natural history of NEMD. All…”
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  16. 16

    Improving the Transition Fault Coverage of Functional Broadside Tests by Observation Point Insertion by Pomeranz, I., Reddy, S.M.

    “…Functional broadside tests were defined to address overtesting that may occur due to high peak current demands when tests for delay faults take the circuit…”
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  17. 17

    On Complete Functional Broadside Tests for Transition Faults by Hangkyu Lee, Pomeranz, I., Reddy, S.M.

    “…It was shown before that tests applied under nonfunctional operation conditions, which are made possible by scanning in an unreachable state, may lead to…”
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  18. 18

    Forward-looking fault simulation for improved static compaction by Pomeranz, I., Reddy, S.M.

    “…Fault simulation of a test set in an order different from the order of generation (e.g., reverse- or random-order fault simulation) is used as a fast and…”
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  19. 19

    Scan-Based Delay Test Types and Their Effect on Power Dissipation During Test by Pomeranz, I., Reddy, S.M.

    “…The peak power dissipated in nonscan logic during fast capture cycles of scan-based two-pattern tests for path delay faults is considered. It is first…”
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  20. 20

    Using Dummy Bridging Faults to Define Reduced Sets of Target Faults by Pomeranz, I., Reddy, S.M.

    “…To address the large numbers of bridging faults in a circuit, several approaches have been proposed for the selection of subsets of bridging faults as targets…”
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