Search Results - "Pileggi, L.T."

Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS by Calhoun, Benton H., Cao, Yu, Li, Xin, Mai, Ken, Pileggi, Lawrence T., Rutenbar, Rob A., Shepard, Kenneth L.

“…Well-designed circuits are one key ldquoinsulatingrdquo layer between the increasingly unruly behavior of scaled complementary metal-oxide-semiconductor…”
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IC thermal simulation and modeling via efficient multigrid-based approaches by Peng Li, Pileggi, L.T., Asheghi, M., Chandra, R.

“…The ever-increasing power consumption and packaging density of integrated systems creates on-chip temperatures and gradients that can have a substantial impact…”
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Compact reduced-order modeling of weakly nonlinear analog and RF circuits by Peng Li, Pileggi, L.T.

“…A compact nonlinear model order-reduction method (NORM) is presented that is applicable for time-invariant and periodically time-varying weakly nonlinear…”
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Regular Analog/RF Integrated Circuits Design Using Optimization With Recourse Including Ellipsoidal Uncertainty by Yang Xu, Kan-Lin Hsiung, Xin Li, Pileggi, L.T., Boyd, S.P.

“…Long design cycles due to the inability to predict silicon realities are a well-known problem that plagues analog/RF integrated circuit product development. As…”
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Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations by Xin Li, Jiayong Le, Celik, M., Pileggi, L.T.

“…The large-scale process and environmental variations for today's nanoscale ICs require statistical approaches for timing analysis and optimization. In this…”
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Efficient per-nonlinearity distortion analysis for analog and RF circuits by Peng Li, Pileggi, L.T.

“…An efficient distortion analysis methodology is presented for analog and RF circuits that utilizes linear-centric circuit models to generate individual…”
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Metal-mask configurable RF front-end circuits by Yang Xu, Boone, C., Pileggi, L.T.

“…This paper describes metal-mask configurable RF circuits using a base circuit fabric that can be configured for various wireless applications using only upper…”
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TETA: transistor-level waveform evaluation for timing analysis by Acar, E., Dartu, F., Pileggi, L.T.

“…Static timing analysis breaks down the longest path problem into waveform analysis of paths of logic stages that are comprised of nonlinear transistors and…”
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Parasitics extraction with multipole refinement by Beattie, M.W., Pileggi, L.T.

“…Modern chip design pushes the performance of a given technology to its limits, therefore, it is necessary to find increasingly more accurate models for…”
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On-chip induction modeling: basics and advanced methods by Beattie, M.W., Pileggi, L.T.

“…Modeling magnetic interactions for on-chip interconnect has become an issue of great interest for integrated circuit design in recent years. This paper…”
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Global and local congestion optimization in technology mapping by Pandini, D., Pileggi, L.T., Strojwas, A.J.

“…In this era of deep submicrometer technologies, interconnects are becoming increasingly important as their effects strongly impact the integrated circuit (IC)…”
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PRIMA: passive reduced-order interconnect macromodeling algorithm by Odabasioglu, A., Celik, M., Pileggi, L.T.

“…This paper describes an algorithm for generating provably passive reduced-order N-port models for RLC interconnect circuits. It is demonstrated that, in…”
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Transmission line synthesis via constrained multivariable optimization by Gupta, R., Krauter, B., Pileggi, L.T.

“…The design of system level interconnects to meet signal integrity objectives is a challenging problem. This paper formulates the transmission line synthesis…”
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Asymptotic Probability Extraction for Nonnormal Performance Distributions by Xin Li, Le, J., Gopalakrishnan, P., Pileggi, L.T.

“…While process variations are becoming more significant with each new IC technology generation, they are often modeled via linear regression models so that the…”
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Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits by Xin Li, Yaping Zhan, Pileggi, L.T.

“…In this paper, we propose an efficient numerical algorithm for estimating the parametric yield of analog/RF circuits, considering large-scale process…”
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Robust Analog/RF Circuit Design With Projection-Based Performance Modeling by Xin Li, Gopalakrishnan, P., Yang Xu, Pileggi, L.T.

“…In this paper, a robust analog design (ROAD) tool for post-tuning (i.e., locally optimizing) analog/RF circuits is proposed. Starting from an initial design…”
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SRAM parametric failure analysis by Wang, Jian, Yaldiz, Soner, Li, Xin, Pileggi, Lawrence T.

“…With aggressive technology scaling, SRAM design has been seriously challenged by the difficulties in analyzing rare failure events. In this paper we propose to…”
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A 0.6-to-1V inverter-based 5-bit flash ADC in 90nm digital CMOS by Proesel, J.E., Pileggi, L.T.

“…A 0.6-to-1 V inverter-based 5-bit flash ADC in 90 nm digital CMOS is presented. Single-ended comparators are formed using digital inverters and resistors. The…”
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STAC: statistical timing analysis with correlation by Le, Jiayong, Li, Xin, Pileggi, Lawrence T.

“…Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to…”
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TACO: timing analysis with coupling by Arunachalam, Ravishankar, Rajagopal, Karthik, Pileggi, Lawrence T.

“…The impact of coupling capacitance on delay is usually estimated by scaling the coupling capacitances (often by a factor of 2) and modeling them as grounded…”
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