Search Results - "Paulin, P. G."

Refine Results
  1. 1

    Force-directed scheduling for the behavioral synthesis of ASICs by Paulin, P.G., Knight, J.P.

    “…A general scheduling methodology is presented that can be integrated into specialized or general-purpose high-level synthesis systems. An initial version of…”
    Get full text
    Journal Article
  2. 2

    Scheduling and binding algorithms for high-level synthesis by Paulin, P. G., Knight, J. P.

    Published in 26th ACM/IEEE Design Automation Conference (01-06-1989)
    “…New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list…”
    Get full text
    Conference Proceeding
  3. 3

    Horizontal partitioning of PLA-based finite state machines by Paulin, P. G.

    Published in 26th ACM/IEEE Design Automation Conference (01-06-1989)
    “…We present a new form of partitioning of PLA-based FSMs that combines the advantages of traditional vertical PLA partitioning (i.e. via inputs and/or outputs)…”
    Get full text
    Conference Proceeding
  4. 4

    StepNP: a system-level exploration platform for network processors by Paulin, P.G., Pilkington, C., Bensoudane, E.

    Published in IEEE design & test of computers (01-11-2002)
    “…The fast-changing communications market requires high-performance yet flexible network-processing platforms. StepNP is an exploratory network processor…”
    Get full text
    Journal Article
  5. 5

    Embedded systems technologies for application-specific architecture platforms by Paulin, P G

    “…This talk addresses the emerging architectural platform approach to improve time-to-market, and the design automation technologies needed to support it…”
    Get full text
    Journal Article
  6. 6

    Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia by Paulin, P.G., Pilkington, C., Langevin, M., Bensoudane, E., Lyonnard, D., Benny, O., Lavigueur, B., Lo, D., Beltrame, G., Gagne, V., Nicolescu, G.

    “…The MultiFlex system is an application-to-platform mapping tool that integrates heterogeneous parallel components-H/W or S/W- into a homogeneous platform…”
    Get full text
    Journal Article Conference Proceeding
  7. 7

    FlexWare: a retargetable, embedded-software development environment by Paulin, P.G., Santana, M.

    Published in IEEE design & test of computers (01-07-2002)
    “…Effective embedded software development tools are essential to better exploit the inherent capabilities of these processors. We developed the FlexWare embedded…”
    Get full text
    Journal Article
  8. 8

    HAL: a multi-paradigm approach to automatic data path synthesis by Paulin, P. G., Knight, J. P., Girczyc, E. F.

    “…A novel approach to automatic data path synthesis is presented. This approach features innovations in the synthesis process as well as in the system…”
    Get full text
    Conference Proceeding
  9. 9

    Algorithms for high-level synthesis by Paulin, P.G., Knight, J.P.

    Published in IEEE design & test of computers (01-12-1989)
    “…Synthesis algorithms that offer a technique for scheduling operations and allocating registers and buses in light of both timing constraints and available…”
    Get full text
    Journal Article
  10. 10
  11. 11
  12. 12

    Force-directed scheduling in automatic data path synthesis by Paulin, P. G., Knight, J. P.

    Published in 24th ACM/IEEE Design Automation Conference (01-10-1987)
    “…The HAL system performs data path synthesis using a new scheduling algorithm that is part of an interdependent scheduling and allocation scheme. This scheme…”
    Get full text
    Conference Proceeding
  13. 13

    DATE panel chips of the future: soft, crunchy or hard? by Paulin, P.G.

    “…Today's electronic products are composed of an increasingly diverse set of ICs, ranging from dedicated ASICs, domain-specific ASSPs, platform FPGAs, to…”
    Get full text
    Conference Proceeding
  14. 14

    Embedded software in real-time signal processing systems: application and architecture trends by Paulin, P.G., Liem, C., Cornero, M., Nacabal, F., Goossens, G.

    Published in Proceedings of the IEEE (01-03-1997)
    “…We present an extensive survey of trends in embedded processor use with an emphasis on emerging applications in wireless communication, multimedia, and general…”
    Get full text
    Journal Article
  15. 15

    MPSoC memory optimization for digital camera applications by Bouchebaba, Y., Lavigueur, B., Girodias, B., Nicolescu, G., Paulin, P.G.

    “…Multiprocessor system-on-a-chip architectures have received a lot of attention in the past years, but few advances in compilation techniques are targeting…”
    Get full text
    Conference Proceeding
  16. 16

    Embedded software in real-time signal processing systems: design technologies by Goossens, G., Van Praet, J., Lanneer, D., Geurts, W., Kifli, A., Liem, C., Paulin, P.G.

    Published in Proceedings of the IEEE (01-03-1997)
    “…The increasing use of embedded software, often implemented on a core processor in a single-chip system, is a clear trend in the telecommunications, multimedia,…”
    Get full text
    Journal Article
  17. 17

    HAL: A Multi-Paradigm Approach to Automatic Data Path Synthesis by Paulin, P.G., Knight, J.P., Girczyc, E.F.

    “…A novel approach to automatic data path synthesis is presented. This approach features innovations in the synthesis process as well as in the system…”
    Get full text
    Conference Proceeding
  18. 18

    Application of a multi-processor SoC platform to high-speed packet forwarding by Paulin, P.G., Pilkington, C., Bensoudane, E., Langevin, M., Lyonnard, D.

    “…In this paper, we explore the requirements of emerging complex SoC's and describe StepNP, an experimental flexible, multi-processor SoC platform targeted…”
    Get full text
    Conference Proceeding
  19. 19

    Network processors: a perspective on market requirements, processor architectures and embedded S/W tools by Paulin, P.G., Karim, F., Bromley, P.

    “…With the projected explosion of low-cost bandwidth availability, the intensive processing tasks and service hosting will move close to consumers on the…”
    Get full text
    Conference Proceeding
  20. 20

    Network processing challenges and an experimental NPU platform [network processor unit] by Paulin, P.G., Pilkington, C., Bensoudane, E.

    “…The fast-changing communications market requires high-performance yet flexible network-processing platforms. StepNP/spl trade/ is an exploratory network…”
    Get full text
    Conference Proceeding