Search Results - "Parra Fernandez, Pilar"

Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA by Potestad-Ordóñez, Francisco Eugenio, Valencia-Barrero, Manuel, Baena-Oliva, Carmen, Parra-Fernández, Pilar, Jiménez-Fernández, Carlos Jesús

“…One of the best methods to improve the security of cryptographic systems used to exchange sensitive information is to attack them to find their vulnerabilities…”
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Teaching based on proposed by students designs: a case study by Jimenez-Fernandez, Carlos Jesus, Oliva, Carmen Baena, Fernandez, Pilar Parra, Barrero, Manuel Valencia, Ordonez, Francisco Eugenio Potestad, Sanchez, Erica Tena, Soto, Alejandro Gallardo

“…Learning digital design at RT level is enhanced by practical, lab-based tasks. These tasks, if chosen appropriately, can be highly motivating. The fact that…”
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An Academic Approach to FPGA Design Based on a Distance Meter Circuit by Jimenez-Fernandez, Carlos Jesus, Oliva, Carmen Baena, Fernandez, Pilar Parra, Potestad-Ordonez, F. Eugenio, Valencia-Barrero, Manuel

“…Digital design learning at Register Transfer (RT) level requires practical and complex examples as learning progresses. FPGAs and development boards offer a…”
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Distance measurement as a practical example of FPGA design by Fernandez, Carlos Jimenez, Fernandez, Pilar Parra, Oliva, Carmen Baena, Barrero, Manuel Valencia, Ordonez, F. Eugenio Potestad

“…Digital design learning at the RT level requires practical examples and as learning progresses, the examples need to become more complex. FPGAs and development…”
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FPGA design example for maximum operating frequency measurements by Fernandez, Carlos Jimenez, Parra Fernandez, Pilar, Oliva, Carmen Baena, Valencia Barrero, Manuel, Potestad Ordonez, F. Eugenio

“…The best way to learn how to design digital systems at the RT level is to use practical examples. In addition, from a teaching point of view, the more…”
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Project-based learning of digital design: Using RGB LEDs by Jimenez-Fernandez, Carlos Jesus, Oliva, Carmen Baena, Fernandez, Pilar Parra, Barrero, Manuel Valencia

“…Learning digital design at RT level is enhanced by practical, lab-based assignments. These tasks, if chosen appropriately, can be highly motivating. Using…”
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Learning VHDL through teamwork FPGA game design by Jimenez-Fernandez, Carlos Jesus, Oliva, Carmen Baena, Fernandez, Pilar Parra, Soto, Alejandro Gallardo, Ordonez, Francisco Eugenio Potestad, Barrero, Manuel Valencia

“…The learning of digital design at the RT level by the students improves with practical work, which can be developed in teams, allow both the gradual advance of…”
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