Search Results - "Parks, H.G."

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  1. 1

    VHDL-AMS Modeling of Total Ionizing Dose Radiation Effects on CMOS Mixed Signal Circuits by Mikkola, E.O., Vermeire, B., Parks, H.G., Graves, R.

    Published in IEEE transactions on nuclear science (01-08-2007)
    “…A hierarchical method for total dose effects simulation of large mixed signal circuits using VHDL-AMS is described. Simplified behavioral models (or…”
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    Journal Article
  2. 2

    SET tolerant CMOS comparator by Mikkola, E., Vermeire, B., Barnaby, H.J., Parks, H.G., Borhani, K.

    Published in IEEE transactions on nuclear science (01-12-2004)
    “…A novel way to mitigate single event transients (SETs) in a comparator by using auto-zeroing techniques is presented. Two comparators, a folded cascode…”
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    Journal Article
  3. 3

    Hafnium or zirconium high-k fab cross-contamination issues by Vermeire, B., Pandit, V.S., Parks, H.G., Raghavan, S., Ramkumar, K., Joong Jeon

    “…Hf and Zr contamination during immersion in process solutions is most likely to occur in neutral and caustic solutions. Both Hf and Zr contamination are…”
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    Journal Article
  4. 4

    The effect of copper contamination on field overlap edges and perimeter junction leakage current by Vermeire, B., Lee, L., Parks, H.G.

    “…This work demonstrates that copper contamination present on pre gate-oxidation silicon surfaces results in yield and reliability problems particularly at field…”
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    Journal Article Conference Proceeding
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    Quantifying the impact of homogeneous metal contamination using test structure metrology and device modeling by Parks, H.G., Schrimpf, R.D., Craigin, B., Jones, R., Resnick, P.

    “…Deposition of metallic impurities from HF process solutions has been investigated experimentally and explained theoretically in a qualitative manner. The…”
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    Journal Article
  6. 6

    Effect of Deep-Level Defects on Surface Recombination Velocity at the Interface Between Silicon and Dielectric Films by Imangholi, B., Fee Li Lie, Parks, H.G., Muscat, A.J.

    Published in IEEE transactions on electron devices (01-04-2010)
    “…The surface recombination velocity (SRV) characteristic of deep-level defects at Si interfaces with dielectric thin films was obtained from conductance…”
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    Journal Article
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    The influence of copper contamination on gate oxide integrity by Vermeire, B., Parks, H.G.

    “…It is shown that low levels of copper contamination present on pre-oxidation silicon surfaces significantly affect not only the area, but also the field…”
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    Conference Proceeding
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    A model for outgassing of organic contamination from wafer carrier boxes by Yu-Min Ho, Parks, H.G., Vermeire, B.

    “…A thermal desorption apparatus has been developed to study the adsorption and desorption of organic contaminants on silicon wafers due to outgassing from…”
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    Conference Proceeding
  11. 11

    Fast turn around post process yield enhancement for custom VLSI foundries by Parks, H.G.

    “…An effective fast-turnaround postprocess yield-enhancement methodology for custom VLSI which has been developed using a static random access memory (SRAM) and…”
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    Conference Proceeding
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    The influence of the pre-anneal ambient on the gate oxide integrity effect of copper contamination by Vermeire, B., Parks, H.G.

    “…Three sets of wafers, the first used as delivered, the second pre-annealed in oxygen and the third pre-annealed in nitrogen, were contaminated with copper…”
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    Conference Proceeding
  14. 14

    Concept and initial feasibility of contamination TCAD by integration with commercial software by Hofmeister, J., Parks, H.G., Vermeire, B., Murshalin, Z., Graves, R., Schrimpf, R.D., Galloway, K.F.

    “…Flexible manufacturing of ICs depends on technology computer-aided design (TCAD) tools. As ICs scale, contamination effects become more significant. Metal ions…”
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    Conference Proceeding
  15. 15

    The nature of defect size distributions in semiconductor processes by Parks, H.G., Burke, E.A.

    “…The combination of a small static random access memory (SRAM) and a test element group (TEG) has been shown to be an effective yield monitor for VLSI. Defects…”
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    Conference Proceeding
  16. 16

    The nature of defect size distributions in semiconductor processes by Parks, H.G., Burke, E.A.

    “…Summary form only given. The combination of a small static random access memory (SRAM) and a test element group (TEG) has been shown to be an effective yield…”
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    Conference Proceeding
  17. 17

    Total dose radiation effect simulations on a high-precision data acquisition system by Mikkola, E., Vermeire, B., Chiu, T., Barnaby, H., Parks, H.G.

    “…A novel method to evaluate total dose radiation response on large mixed signal circuits is described. The method is based on partly behavioral, partly…”
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    Conference Proceeding
  18. 18

    Yield modeling from SRAM failure analysis by Parks, H.G.

    “…Yield models based on Poisson, bose-Einstein, and binomial statistics are compared for a 1.25 mu m CMOS process. A mixed binomial yield model is shown to most…”
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    Conference Proceeding
  19. 19

    Research accomplishments at the University of Arizona SEMATECH Center of Excellence for contamination/defect assessment and control by Parks, H.G., O'Hanlon, J.F., Shadman, F.

    “…The Arizona SEMATECH Center of Excellence (SCOE) was established in May of 1988, is funded by SEMATECH and contractually monitored by the Semiconductor…”
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    Journal Article
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    Research accomplishments at the University of Arizona SEMATECH Center of Excellence for contamination/defect assessment and control by Parks, H.G., O'Hanlon, J.F., Shadman, F.

    “…The Arizona SEMATECH Center of Excellence (SCOE) was established in May of 1988. The SCOE is engaged in research on a broad front to understand and control…”
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    Conference Proceeding