Search Results - "POTKONJAK, M"

MediaBench: a tool for evaluating and synthesizing multimedia and communications systems by Chunho Lee, Potkonjak, M., Mangione-Smith, W.H.

“…Significant advances have been made in compilation technology for capitalizing on instruction-level parallelism (ILP). The vast majority of ILP compilation…”
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Local watermarks: methodology and application to behavioral synthesis by Kirovski, D., Potkonjak, M.

“…Recently, the electronic design automation industry has adopted the intellectual property (IP) business model as a dominant system-on-chip development…”
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Constraint-based watermarking techniques for design IP protection by Kahng, A.B., Lach, J., Mangione-Smith, W.H., Mantik, S., Markov, I.L., Potkonjak, M., Tucker, P., Wang, H., Wolfe, G.

“…Digital system designs are the product of valuable effort and know-how. Their embodiments, from software and hardware description language program down to…”
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Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination by Potkonjak, M., Srivastava, M.B., Chandrakasan, A.P.

“…Many applications in DSP, telecommunications, graphics, and control have computations that either involve a large number of multiplications of one variable…”
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Power optimization of variable-voltage core-based systems by Hong, I., Kirovski, D., Gang Qu, Potkonjak, M., Srivastava, M.B.

“…The growing class of portable systems, such as personal computing and communication devices, has resulted in a new set of system design requirements, mainly…”
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Effective iterative techniques for fingerprinting design IP by Caldwell, A.E., Hyun-Jin Choi, Kahng, A.B., Mantik, S., Potkonjak, M., Gang Qu, Wong, J.L.

“…Fingerprinting is an approach that assigns a unique and invisible ID to each sold instance of the intellectual property (IP). One of the key advantages…”
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General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing by Dabiri, F., Nahapetian, A., Massey, T., Potkonjak, M., Sarrafzadeh, M.

“…Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown…”
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Fingerprinting techniques for field-programmable gate array intellectual property protection by Lach, J., Mangione-Smith, W.H., Potkonjak, M.

“…As current computer-aided design (CAD) tool and very large scale integration technology capabilities create a new market of reusable digital designs, the…”
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On communication security in wireless ad-hoc sensor networks by Slijepcevic, S., Potkonjak, M., Tsiatsis, V., Zimbeck, S., Srivastava, M.B.

“…Networks of wireless microsensors for monitoring physical environments have emerged as an important new application area for wireless technology. Key…”
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On-line fault detection of sensor measurements by Koushanfar, F., Potkonjak, M., Sangiovanni-Vincentelli, A.

“…On-line fault detection in sensor networks is of paramount importance due to the convergence of a variety of challenging technological, application,…”
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Actuator-Based Infield Sensor Calibration by Feng, J., Gang Qu, Potkonjak, M.

“…In this paper, an online infield nonparametric calibration and error-modeling approach was developed. The approach employs a single source as the external…”
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Low overhead fault-tolerant FPGA systems by Lach, J., Mangione-Smith, W.H., Potkonjak, M.

“…Fault-tolerance is an important system metric for many operating environments, from automotive to space exploration. The conventional technique for improving…”
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Micropreemption synthesis: an enabling mechanism for multitask VLSI systems by Kyosun Kim, Karri, R., Potkonjak, M.

“…Task preemption is a critical enabling mechanism in multitask very large scale integration (VLSI) systems. On preemption, data in the register files must be…”
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Optimizing power using transformations by Chandrakasan, A.P., Potkonjak, M., Mehra, R., Rabaey, J., Brodersen, R.W.

“…The increasing demand for portable computing has elevated power consumption to be one of the most critical design parameters. A high-level synthesis system,…”
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Enhanced FPGA reliability through efficient run-time fault reconfiguration by Lach, J., Mangione-Smith, W.H., Potkonjak, M.

“…The expanded use of field programmable gate arrays (FPGA) in remote, long life, and system-critical applications requires the development and implementation of…”
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Computational forensic techniques for intellectual property protection by Wong, J.L., Kirovski, D., Potkonjak, M.

“…Computational forensic engineering (CFE) aims to identify the entity that created a particular intellectual property (IP). Specifically, our goal is to…”
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Fingerprinting intellectual property using constraint-addition by Qu, Gang, Potkonjak, Miodrag

“…Recently, intellectual property protection (IPP) techniques attracted a great deal of attention from semiconductor, system integration and software companies…”
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A statistical methodology for wire-length prediction by Wong, J.L., Davoodi, A., Khandelwal, V., Srivastava, A., Potkonjak, M.

“…In this paper, the classic wire-length estimation problem is addressed and a new statistical wire-length estimation approach that captures the probability…”
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Engineering change protocols for behavioral and system synthesis by Kirovski, D., Drinic, M., Potkonjak, M.

“…Rapid prototyping and development of in-circuit and FPGA-based emulators as key accelerators for fast time-to-market has resulted in a need for efficient error…”
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Optimization-intensive watermarking techniques for decision problems by Wong, J.L., Gang Qu, Potkonjak, M.

“…Recently, a number of watermarking-based intellectual property protection techniques have been proposed. Although they have been applied to different stages in…”
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