Search Results - "Ordonez, Francisco Eugenio Potestad"

Protecting FPGA-Based Cryptohardware Implementations from Fault Attacks Using ADCs by Potestad-Ordóñez, Francisco Eugenio, Casado-Galán, Alejandro, Tena-Sánchez, Erica

“…The majority of data exchanged between connected devices are confidential and must be protected against unauthorized access. To ensure data protection,…”
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Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA by Potestad-Ordóñez, Francisco Eugenio, Valencia-Barrero, Manuel, Baena-Oliva, Carmen, Parra-Fernández, Pilar, Jiménez-Fernández, Carlos Jesús

“…One of the best methods to improve the security of cryptographic systems used to exchange sensitive information is to attack them to find their vulnerabilities…”
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Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations by Potestad-Ordóñez, Francisco Eugenio, Tena-Sánchez, Erica, Mora-Gutiérrez, José Miguel, Valencia-Barrero, Manuel, Jiménez-Fernández, Carlos Jesús

“…The security of cryptocircuits is determined not only for their mathematical formulation, but for their physical implementation. The so-called fault injection…”
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Hardware Countermeasures Benchmarking against Fault Attacks by Potestad-Ordóñez, Francisco Eugenio, Tena-Sánchez, Erica, Acosta-Jiménez, Antonio José, Jiménez-Fernández, Carlos Jesús, Chaves, Ricardo

“…The development of differential fault analysis (DFA) techniques and mechanisms to inject faults into cryptographic circuits brings with it the need to use…”
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Gate-Level Hardware Countermeasure Comparison against Power Analysis Attacks by Tena-Sánchez, Erica, Potestad-Ordóñez, Francisco Eugenio, Jiménez-Fernández, Carlos J., Acosta, Antonio J., Chaves, Ricardo

“…The fast settlement of privacy and secure operations in the Internet of Things (IoT) is appealing in the selection of mechanisms to achieve a higher level of…”
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Teaching based on proposed by students designs: a case study by Jimenez-Fernandez, Carlos Jesus, Oliva, Carmen Baena, Fernandez, Pilar Parra, Barrero, Manuel Valencia, Ordonez, Francisco Eugenio Potestad, Sanchez, Erica Tena, Soto, Alejandro Gallardo

“…Learning digital design at RT level is enhanced by practical, lab-based tasks. These tasks, if chosen appropriately, can be highly motivating. The fact that…”
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Learning VHDL through teamwork FPGA game design by Jimenez-Fernandez, Carlos Jesus, Oliva, Carmen Baena, Fernandez, Pilar Parra, Soto, Alejandro Gallardo, Ordonez, Francisco Eugenio Potestad, Barrero, Manuel Valencia

“…The learning of digital design at the RT level by the students improves with practical work, which can be developed in teams, allow both the gradual advance of…”
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