Search Results - "Olsen, Jamieson"

A New Scheme of Redundant Timing Crosschecking for Front-End Systems by Xu, Jingjing, Wu, Jinyuan, Liu, Ted, Olsen, Jamieson T., Sun, Quan

“…In high-energy physics experiments, front-end (FE) digitization modules are usually driven by a common clock. At the front-end electronics and digitization…”
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Multi-Vdd Design for Content Addressable Memories (CAM): A Power-Delay Optimization Analysis by Joshi, Siddhartha, Li, Dawei, Ogrenci-Memik, Seda, Deptuch, Grzegorz, Hoff, James, Jindariani, Sergo, Liu, Tiehui, Olsen, Jamieson, Tran, Nhan

“…In this paper, we characterize the interplay between power consumption and performance of a matchline-based Content Addressable Memory and then propose the use…”
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A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade by Zhang, Wei, Sun, Hanhan, Edwards, Christopher, Gong, Datao, Huang, Xing, Liu, Chonghan, Liu, Tiankuan, Liu, Tiehui, Olsen, Jamieson, Sun, Quan, Sun, Xiangming, Wu, Jinyuan, Ye, Jingbo, Zhang, Li

“…We present the design and test results of a time-to-digital-converter (TDC). The TDC will be a part of the readout Application-Specific Integrated Circuit…”
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Performance Study of the First 2-D Prototype of Vertically Integrated Pattern Recognition Associative Memory by Deptuch, Gregory, Hoff, James, Jindariani, Sergo, Joshi, Siddhartha, Li, Dawei, Liu, Tiehui, Ogrenci-Memik, Seda, Olsen, Jamieson, Tran, Nhan

“…Extremely fast pattern recognition capabilities are necessary to find and fit billions of tracks at the hardware trigger level produced every second…”
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A content addressable memory with multi-Vdd scheme for low power tunable operation by Joshi, Siddhartha, Dawei Li, Ogrenci-Memik, Seda, Deptuch, Grzegorz, Hoff, James, Jindariani, Sergo, Tiehui Liu, Olsen, Jamieson, Nhan Tran

“…This paper reports on a content addressable memory (CAM) employing a multi-Vdd scheme for low power pattern recognition applications. The complete design,…”
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Prototype performance studies of a full mesh ATCA-based general purpose data processing board by Okumura, Yasuyuki, Olsen, Jamieson, Liu, Tiehui Ted, Hang Yin

“…High luminosity conditions at the LHC pose many unique challenges for potential silicon based track trigger systems. One of the major challenges is data…”
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ETROC1: The First Full Chain Precision Timing Prototype ASIC for CMS MTD Endcap Timing Layer Upgrade by Huang, Xing, Sun, Quan, Gong, Datao, Gwak, Piljun, Kim, Doyeong, Lee, Jongho, Liu, Chonghan, Liu, Tiankuan, Liu, Tiehui, Los, Sergey, Miryala, Sandeep, Nanda, Shirsendu, Olsen, Jamieson, Sun, Hanhan, Wu, Jinyuan, Ye, Jingbo, Ye, Zhenyu, Zhang, Li, Zhang, Wei

“…We present the design and characterization of the first full chain precision timing prototype ASIC, named ETL Readout Chip version 1 (ETROC1) for the CMS MTD…”
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A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade by Zhang, Wei, Sun, Hanhan, Edwards, Christopher, Gong, Datao, Huang, Xing, Liu, Chonghan, Liu, Tiankuan, Liu, Tiehui, Olsen, Jamieson, Sun, Quan, Sun, Xiangming, Wu, Jinyuan, Ye, Jingbo, Zhang, Li

“…We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain…”
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Upgrade and operation of the DØ central track trigger by Buehler, Marc, Anderson, John, Angstadt, Robert, Babukhadia, Levan, Bhattacharjee, Mrinmoy, Blazey, Gerald, Boeriu, Oana, Borcherding, Fred, Connolly, Brian, Cooke, Michael, Corcoran, Marjorie, Desai, Satish, Evans, David, Gershtein, Yuri, Grannis, Paul, Grünendahl, Stefan, Han, Liang, Hazen, Eric, Heintz, Ulrich, Hensel, Carsten, Hildreth, Mike, Hoeth, Hendrik, Hu, Yuan, Jabeen, Shabnam, Jain, Vivek, Johnson, Marvin, Khalatian, Samvel, Khalatyan, Norik, Lincoln, Don, Linn, Stephan, Liu, Yanwen, Lizarazo, Juan, Mackin, Dennis, Maravin, Yurii, Martin, Manuel, K Mommsen, Remigius, Mutaf, Yildirim, Narain, Meenakshi, Nöding, Carsten, Olsen, Jamieson, Padley, Paul, Pangilinan, Monica, Partridge, Richard, Ramirez-Gomez, Ricardo, Rapisarda, Stefano, Stevenson, Kyle, Tomoto, Makoto, Vachon, Brigitte, Wijnen, Thei, Wilcer, Neal, Wilson, Graham, Wu, Shouxiang, Wyatt, Terry, Xu, Qichun, Yip, Kin

“…The DØ experiment at the Fermilab p p ¯ Tevatron collider (Batavia, IL, USA) has undergone significant upgrades in anticipation of high luminosity running…”
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The level-1 trigger for the SuperCDMS experiment at SNOLAB by Wilson, Jonathan S, Theenhausen, Hanno Meyer zu, von Krosigk, Belina, Azadbakht, Elham, Bunker, Ray, Hall, Jeter, Hansen, Sten, Hines, Bruce, Loer, Ben, Olsen, Jamieson T, Oser, Scott M, Partridge, Richard, Pyle, Matthew, Sander, Joel, Serfass, Bruno, Toback, David, Watkins, Samuel L, Zhao, Xuji

“…2022 JINST 17 P07010 The SuperCDMS SNOLAB dark matter search experiment aims to be sensitive to energy depositions down to O(1 eV). This imposes requirements…”
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Charged Particle Tracking in Real-Time Using a Full-Mesh Data Delivery Architecture and Associative Memory Techniques by Ajuha, Sudha, Shinoda, Ailton Akira, Ramalho, Lucas Arruda, Baulieu, Guillaume, Boudoul, Gaelle, Casarsa, Massimo, Cascadan, Andre, Clement, Emyr, de Paiva, Thiago Costa, Das, Souvik, Dutta, Suchandra, Eusebi, Ricardo, Fedi, Giacomo, Ferreira, Vitor Finotti, Hahn, Kristian, Hu, Zhen, Jindariani, Sergo, Konigsberg, Jacobo, Liu, Tiehui, Low, Jia Fu, MacDonald, Emily, Olsen, Jamieson, Palla, Fabrizio, Pozzobon, Nicola, Rathjens, Denis, Ristori, Luciano, Rossin, Roberto, Sung, Kevin, Tran, Nhan, Trovato, Marco, Ulmer, Keith, Vaz, Mario, Viret, Sebastien, Wu, Jin-Yuan, Xu, Zijun, Zorzetti, Silvia

“…We present a flexible and scalable approach to address the challenges of charged particle track reconstruction in real-time event filters (Level-1 triggers) in…”
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The Analog Front-end for the LGAD Based Precision Timing Application in CMS ETL by Sun, Quan, Dogra, Sunil M, Edwards, Christopher, Gong, Datao, Gray, Lindsey, Huang, Xing, Joshi, Siddhartha, Lee, Jongho, Liu, Chonghan, Liu, Tiehui, Liu, Tiankuan, Los, Sergey, Moon, Chang-Seong, Oh, Geonhee, Olsen, Jamieson, Ristori, Luciano, Sun, Hanhan, Wang, Xiao, Wu, Jinyuan, Ye, Jingbo, Ye, Zhenyu, Zhang, Li, Zhang, Wei

“…The analog front-end for the Low Gain Avalanche Detector (LGAD) based precision timing application in the CMS Endcap Timing Layer (ETL) has been prototyped in…”
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Performance Study of the First 2D Prototype of Vertically Integrated Pattern Recognition Associative Memory (VIPRAM) by Deptuch, Gregory, Hoff, James, Jindariani, Sergo, Liu, Tiehui, Olsen, Jamieson, Tran, Nhan, Joshi, Siddhartha, Li, Dawei, Ogrenci-Memik, Seda

“…Extremely fast pattern recognition capabilities are necessary to find and fit billions of tracks at the hardware trigger level produced every second…”
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The DO central track trigger by Olsen, J., Anderson, J., Angstadt, R., Babukhadia, L., Bhattacharjee, M., Blazey, G., Borcherding, F., Connolly, B., Cooke, M., Desai, S., Evans, D., Grannis, P., Grunendahl, S., Yuan Hu, Jain, V., Johnson, M., Linn, S., Lizarazo, J., Maravin, Y., Martin, M., Mutaf, Y., Noding, C., Ramirez-Gomez, R., Rapisarda, S., Stevenson, K., Tomoto, M., Vachon, B., Wijnen, T., Wilcer, N., Wilson, G., Qichun Xu, Yip, K.

“…An overview of the system architecture and algorithms used for the DO Central Track Trigger (CTT) in the Run 2 of the Fermilab Tevatron Proton-Antiproton…”
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Real-time data reorganizer for the D0 central fiber tracker trigger system at Fermilab by Rapisarda, S.M., Wilcer, N.G., Olsen, J.T.

“…A custom digital data mixer system has been designed to reorganize, in real time, the data produced by the Fermilab D0 Scintillating Fiber Detector. The data…”
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Prototype performance studies of a Full Mesh ATCA-based General Purpose Data Processing Board by Okumura, Yasuyuki, Olsen, Jamieson, Liu, Tiehui Ted, Yin, Hang

“…High luminosity conditions at the LHC pose many unique challenges for potential silicon based track trigger systems. One of the major challenges is data…”
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Development of an Intelligent Platform Management controller for the Pulsar IIb by Ramalho, Lucas A., Paiva, Thiago C., Iope, Rogerio L., Leal, Beraldo C., Liu, Tiehui T., Olsen, Jamieson, Shinoda, Ailton A., Vaz, Mario

“…The Pulsar IIb is a general purpose FPGA-based processor board designed for full mesh ATCA backplanes. This hardware was originally designed to support Level-1…”
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A methodology for power characterization of associative memories by Dawei Li, Joshi, Siddhartha, Ogrenci-Memik, Seda, Hoff, James, Jindariani, Sergo, Tiehui Liu, Olsen, Jamieson, Tran, Nhan

“…Content Addressable Memories (CAM) have become increasingly more important in applications requiring high speed memory search due to their inherent massively…”
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The central track trigger of the DO experiment by Yuan Hu, Anderson, J., Angstadt, R., Babukhadia, L., Bhattacharjee, M., Blazey, G., Borcherding, F., Connolly, B., Cooke, M., Desai, S., Evans, D., Grannis, P., Grunendahl, S., Hensel, C., Jain, V., Johnson, M., Kopal, M., Linn, S., Lizarazo, J., Maravin, Y., Martin, M., Mutaf, Y., Noding, C., Olsen, J., Ramirez-Gomez, R., Rapisarda, S., Stevenson, K., Tomoto, M., Vachon, B., Wijnen, T., Wilcer, N., Wilson, G., Qichun Xu, Yip, K.

“…The general purpose DO collider detector, located at Fermi National Accelerator Laboratory, is operated in the high luminosity (L=2/spl times/10/sup 32/ cm/sup…”
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First results from the central tracking trigger of the DO experiment by Maravin, Y., Anderson, J., Angstadt, R., Babukhadia, L., Bhattacharjee, M., Blazey, G., Borcherding, F., Connolly, B., Cooke, M., Desai, S., Evans, D., Grannis, P., Grunendahl, S., Hensel, C., Yuan Hu, Jain, V., Johnson, M., Linn, S., Lizarazo, J., Martin, M., Mutaf, Y., Noding, C., Olsen, J., Ramirez-Gomez, R., Rapisarda, S., Stevenson, K., Tomoto, M., Vachon, B., Wijnen, T., Wilcer, N., Wilson, G., Qichun Xu, Yip, K.

“…An overview of the DO Central Track Trigger (CTT) for the Tevatron Run 2 program is presented. This newly commissioned system uses information from the DO…”
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