Search Results - "Ok, Injo"

HERMES-Core-A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs by Khaddam-Aljameh, Riduan, Stanisavljevic, Milos, Fornt Mas, Jordi, Karunaratne, Geethan, Brandli, Matthias, Liu, Feng, Singh, Abhairaj, Muller, Silvia M., Egger, Urs, Petropoulos, Anastasios, Antonakopoulos, Theodore, Brew, Kevin, Choi, Samuel, Ok, Injo, Lie, Fee Li, Saulnier, Nicole, Chan, Victor, Ahsan, Ishtiaq, Narayanan, Vijay, Nandakumar, S. R., Le Gallo, Manuel, Francese, Pier Andrea, Sebastian, Abu, Eleftheriou, Evangelos

“…We present a 256 <inline-formula> <tex-math notation="LaTeX">\times </tex-math></inline-formula> 256 in-memory compute (IMC) core designed and fabricated in…”
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Mechanism and Impact of Bipolar Current Voltage Asymmetry in Computational Phase-Change Memory by Sarwat, Syed Ghazi, Le Gallo, Manuel, Bruce, Robert L, Brew, Kevin, Kersting, Benedikt, Jonnalagadda, Vara Prasad, Ok, Injo, Saulnier, Nicole, BrightSky, Matthew, Sebastian, Abu

“…Nanoscale resistive memory devices are being explored for neuromorphic and in-memory computing. However, non-ideal device characteristics of read noise and…”
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Impact of Phase‐Change Memory Flicker Noise and Weight Drift on Analog Hardware Inference for Large‐Scale Deep Learning Networks by Han, Jin-Ping, Rasch, Malte J., Liu, Zuoguang, Solomon, Paul, Brew, Kevin, Cheng, Kangguo, Ok, Injo, Chan, Victor, Longstreet, Michael, Kim, Wanki, Bruce, Robert L., Cheng, Cheng-Wei, Saulnier, Nicole, Narayanan, Vijay

“…The analog AI core concept is appealing for deep‐learning (DL) because it combines computation and memory functions into a single device. Yet, significant…”
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Self-aligned n-channel metal-oxide-semiconductor field effect transistor on high-indium-content In0.53Ga0.47As and InP using physical vapor deposition HfO2 and silicon interface passivation layer by Ok, InJo, Kim, H., Zhang, M., Zhu, F., Park, S., Yum, J., Zhao, H., Garcia, Domingo, Majhi, Prashant, Goel, N., Tsai, W., Gaspe, C. K., Santos, M. B., Lee, Jack C.

“…In this work, we present the electrical and material characteristics of TaN∕HfO2∕In0.53Ga0.47As and InP substrate metal-oxide-semiconductor capacitors and…”
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Correlated Flicker Noise and Hole Mobility Characteristics of (\hbox)/\langle\hbox\rangle Uniaxially Strained SiGe FINFETs by Rajamohanan, B., Injo Ok, Mujumdar, S., Hobbs, C., Majhi, P., Jammy, R., Datta, S.

“…Hole mobility and flicker noise characteristics of uniaxially strained ( 110)/〈110〉 Si 0.75 Ge 0.25 pFINFETs (SSGOI 0.25 ) are investigated in this letter…”
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Impact of Fin Doping and Gate Stack on FinFET (110) and (100) Electron and Hole Mobilities by Akarvardar, K., Young, C. D., Baykan, M. O., Injo Ok, Tat Ngai, Kah-Wee Ang, Rodgers, M. P., Gausepohl, S., Majhi, P., Hobbs, C., Kirsch, P. D., Jammy, R.

“…Double-gate FinFET (110) (110) and (100) (100} electron mobility (μ e ) and hole mobility (μ h ) are experimentally investigated for the following: 1) a wide…”
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Interface-Trap Effects in Inversion-Type Enhancement-Mode \hbox N-Channel MOSFETs by Morassi, L, Padovani, A, Verzellesi, G, Veksler, D, Injo Ok, Bersuker, G

“…Interface-trap effects are analyzed in inversion-type enhancement-mode In 0.53 Ga 0.47 /ZrO 2 and In 0.53 Ga 0.47 As/In 0.2 Ga 0.8 As/ZrO 2 n-channel MOSFETs…”
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Impact of NiPt Thickness Scaling on Contact Resistance From Thin-Body FD SOI to Trigate FETs by Akarvardar, K., Rodgers, M., Kaushik, V., Johnson, C. S., Hyuncher Chong, Injo Ok, Kah-Wee Ang, Gausepohl, S., Hobbs, C., Kirsch, P., Jammy, R.

“…The impact of NiPt thickness scaling on total resistance is investigated using short-channel (L g = 40 nm) nm high-k metal-gate complementary SOI MOSFETs with…”
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Influence of the substrate orientation on the electrical and material properties of GaAs metal-oxide-semiconductor capacitors and self-aligned transistors using HfO2 and silicon interface passivation layer by Ok, InJo, Kim, H., Zhang, M., Zhu, F., Park, S., Yum, J., Zhao, H., Garcia, Domingo, Majhi, Prashant, Lee, Jack C.

“…In this work, we studied the effects of postdeposition anneal (PDA) time and Si interface passivation layer on the material and electrical characteristics of…”
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Gradient descent-based programming of analog in-memory computing cores by Büchel, Julian, Vasilopoulos, Athanasios, Kersting, Benedikt, Odermatt, Frederic, Brew, Kevin, Ok, Injo, Choi, Sam, Saraf, Iqbal, Chan, Victor, Philip, Timothy, Saulnier, Nicole, Narayanan, Vijay, Gallo, Manuel Le, Sebastian, Abu

“…2022 International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2022, pp. 33.1.1-33.1.4 The precise programming of crossbar arrays of unit-cells is…”
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Effects of tantalum penetration through hafnium oxide layer on carrier generation rate in silicon substrate and carrier mobility degradation by Kang, Chang Yong, Rhee, Se Jong, Choi, Chang Hwan, Akvar, M. S., Zhang, Manhong, Lee, Taekhwi, Ok, Injo, Lee, Jack C.

“…This letter presents the effects of tantalum penetration through hafnium oxide on bulk carrier generation rates and carrier mobility degradation. The…”
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Systematic analysis of silicon oxynitride interfacial layer and its effects on electrical characteristics of high-k HfO2 transistor by Rhee, Se Jong, Zhu, Feng, Kim, Hyoung-Sub, Kang, Chang Yong, Choi, Chang Hwan, Zhang, Manhong, Lee, Tackhwi, Ok, Injo, Krishnan, Siddarth A., Lee, Jack C.

“…High-k hafnium oxide dielectric metal-oxide-semiconductor field-effect transistors with several physical thicknesses of silicon oxynitride interfacial layers…”
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A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference by Gallo, Manuel Le, Khaddam-Aljameh, Riduan, Stanisavljevic, Milos, Vasilopoulos, Athanasios, Kersting, Benedikt, Dazzi, Martino, Karunaratne, Geethan, Braendli, Matthias, Singh, Abhairaj, Mueller, Silvia M, Buechel, Julian, Timoneda, Xavier, Joshi, Vinay, Egger, Urs, Garofalo, Angelo, Petropoulos, Anastasios, Antonakopoulos, Theodore, Brew, Kevin, Choi, Samuel, Ok, Injo, Philip, Timothy, Chan, Victor, Silvestre, Claire, Ahsan, Ishtiaq, Saulnier, Nicole, Narayanan, Vijay, Francese, Pier Andrea, Eleftheriou, Evangelos, Sebastian, Abu

“…Nature Electronics 6, 680-693 (2023) The need to repeatedly shuttle around synaptic weight values from memory to processing units has been a key source of…”
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Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs by Morassi, L, Verzellesi, G, Padovani, A, Larcher, L, Pavan, P, Veksler, D, Injo Ok, Bersuker, G

“…Interface-trap effects are analyzed in inversion-type, self-aligned In 0.53 Ga 0.47 As and In 0.53 Ga 0.47 As/ In 0.2 Ga 0.8 As MOSFETs with ALD ZrO 2 gate…”
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Selective phase modulation of NiSi using N-ion implantation for high performance dopant-segregated source/drain n-channel MOSFETs by Loh, W.-Y., Hung, P.Y., Coss, B.E., Kalra, P., Injo Ok, Smith, G., Kang, C.-Y., Lee, S.-H., Oh, J., Sassman, B., Majhi, P., Kirsch, P., Tseng, H.-H., Jammy, R.

“…We have developed a novel dual phase-modulated Ni silicide for Schottky barrier and series resistance reduction in dopant-segregated source/drain (DSS)…”
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A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference by Le Gallo, Manuel, Khaddam-Aljameh, Riduan, Stanisavljevic, Milos, Vasilopoulos, Athanasios, Kersting, Benedikt, Dazzi, Martino, Karunaratne, Geethan, Brändli, Matthias, Singh, Abhairaj, Müller, Silvia M., Büchel, Julian, Timoneda, Xavier, Joshi, Vinay, Rasch, Malte J., Egger, Urs, Garofalo, Angelo, Petropoulos, Anastasios, Antonakopoulos, Theodore, Brew, Kevin, Choi, Samuel, Ok, Injo, Philip, Timothy, Chan, Victor, Silvestre, Claire, Ahsan, Ishtiaq, Saulnier, Nicole, Narayanan, Vijay, Francese, Pier Andrea, Eleftheriou, Evangelos, Sebastian, Abu

“…Analogue in-memory computing (AIMC) with resistive memory devices could reduce the latency and energy consumption of deep neural network inference tasks by…”
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n- and p-channel TaN/HfO2 MOSFETs on GaAs substrate using a germanium interfacial passivation layer by Hyoung-Sub Kim, Injo Ok, Feng Zhu, Zhang, M., Park, S., Yum, J., Zhao, H., Lee, J.C.

“…Using a thin germanium interfacial passivation layer (IPL), for the first time we present surface channel n- and p-MOSFETs on GaAs substrate with TaN gate…”
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HERMES-Core—A 1.59-TOPS/mm 2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs by Khaddam-Aljameh, Riduan, Stanisavljevic, Milos, Fornt Mas, Jordi, Karunaratne, Geethan, Brandli, Matthias, Liu, Feng, Singh, Abhairaj, Muller, Silvia M., Egger, Urs, Petropoulos, Anastasios, Antonakopoulos, Theodore, Brew, Kevin, Choi, Samuel, Ok, Injo, Lie, Fee Li, Saulnier, Nicole, Chan, Victor, Ahsan, Ishtiaq, Narayanan, Vijay, Nandakumar, S. R., Le Gallo, Manuel, Francese, Pier Andrea, Sebastian, Abu, Eleftheriou, Evangelos

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The impact of gate to drain spacing on hot-carrier degradation in sub-100nm Ni–Pt salicidation FinFETs by Lee, Seung Min, Lee, Hi-Deok, Ok, Injo, Oh, Jungwoo

“…•Ni-related defects in Ni–Si salicide in the silicon region during salicidation.•Influence of Ni–Si salicidation-induced defects on hot carrier…”
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Metal gate-HfO2 metal-oxide-semiconductor capacitors on n-GaAs substrate with silicon/germanium interfacial passivation layers by Kim, Hyoung-Sub, Ok, Injo, Zhang, Manhong, Lee, Tackhwi, Zhu, Feng, Yu, Lu, Lee, Jack C.

“…In this letter, the authors present the capacitance-voltage and current-voltage characteristics of TaN∕HfO2∕n-GaAs metal-oxide-semiconductor capacitors with…”
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