Search Results - "Ohmacht, M."
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A 1.3-GOPS parallel DSP for high-performance image-processing applications
Published in IEEE journal of solid-state circuits (01-07-2000)“…A programmable digital signal processor (DSP) for real-time image processing is presented that combines the concepts of single-instruction multiple-data (SIMD)…”
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Journal Article -
2
The eDRAM based L3-cache of the BlueGene/L supercomputer processor node
Published in 16th Symposium on Computer Architecture and High Performance Computing (2004)“…BlueGene/L is a supercomputer consisting of 64K dual-processor system-on-a-chip compute nodes, capable of delivering an arithmetic peak performance of…”
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Conference Proceeding -
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Realization of a programmable parallel DSP for high performance image processing applications
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 35th annual conference on Design automation; 15-19 June 1998 (01-01-1998)“…Architecture and design of the HiPAR-DSP, a SIMD controlled signalprocessor with parallel data paths, VLIW and novel memory design.The processor architecture…”
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Conference Proceeding -
4
Influences of object based segmentation onto multimedia hardware architectures
Published in 1998 IEEE International Symposium on Circuits and Systems (ISCAS) (1998)“…This paper describes essential differences in the video coding part of recent multimedia communication schemes (as the MPEG-4 standard being currently under…”
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Conference Proceeding -
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Parallel implementation of medium level algorithms on a monolithic ASIMD multiprocessor
Published in 1996 IEEE International Symposium on Circuits and Systems (ISCAS) (1996)“…The efficient implementation of algorithms with irregular data access or control-flow on a parallel SIMD processor requires specific architectural measures…”
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Conference Proceeding -
6
HiPAR-DSP: a parallel VLIW RISC processor for real time image processing applications
Published in Proceedings of 3rd International Conference on Algorithms and Architectures for Parallel Processing (1997)“…Derived from a thorough analysis of a wide class of image processing algorithms' properties, a parallel RISC architecture has been developed. The architecture…”
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Conference Proceeding -
7
Creating the BlueGene/L supercomputer from low-power SoC ASICs
Published in ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005 (2005)“…An overview of the design aspects of the BlueGene/L chip, the heart of the BlueGene/L supercomputer, is presented. Following an SoC approach, processors,…”
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Conference Proceeding -
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Cellular supercomputing with system-on-a-chip
Published in 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) (2002)“…System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used…”
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Conference Proceeding Journal Article -
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A Holistic Approach to System Reliability in Blue Gene
Published in International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems (IWIA'06) (01-01-2006)“…Optimizing supercomputer performance requires a balance between objectives for processor performance, network performance, power delivery and cooling, cost and…”
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Conference Proceeding -
10
A 1.3 GOPS parallel DSP for high performance image processing applications
Published in Proceedings of the 25th European Solid-State Circuits Conference (1999)“…In this paper, a programmable DSP for real time image processing is presented that combines the concepts of VLIW and SIMD with a high utilization of parallel…”
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Conference Proceeding -
11
Cellular supercomputing with system-on-a-chip
Published in 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) (2002)“…System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used…”
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Conference Proceeding -
12
An overview of the BlueGene/L Supercomputer
Published in Proceedings of the 2002 ACM/IEEE conference on Supercomputing (16-11-2002)“…This paper gives an overview of the BlueGene/L Supercomputer. This is a jointly funded research partnership between IBM and the Lawrence Livermore National…”
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Conference Proceeding -
13
Blue Gene/L, a system-on-a-chip
Published in Proceedings. IEEE International Conference on Cluster Computing (2002)“…Summary form only given. Large powerful networks coupled to state-of-the-art processors have traditionally dominated supercomputing. As technology advances,…”
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Conference Proceeding