Search Results - "OKAYAMA, Yasunori"

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  1. 1
    Low-power logic circuit and SRAM cell applications with silicon on depletion Layer CMOS (SODEL CMOS) technology

    Low-power logic circuit and SRAM cell applications with silicon on depletion Layer CMOS (SODEL CMOS) technology by Inaba, S., Nagano, H., Miyano, K., Mizushima, I., Okayama, Y., Nakauchi, T., Ishimaru, K., Ishiuchi, H.

    Published in IEEE journal of solid-state circuits (01-06-2006)
    “…In this paper, the switching performance of Silicon on Depletion Layer CMOS (SODEL CMOS) is investigated with a view to realizing high-speed and low-power CMOS…”
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  2. 2
    A highly manufacturable high density embedded SRAM technology for 90nm CMOS

    A highly manufacturable high density embedded SRAM technology for 90nm CMOS by FUKAURA, Yasuhiro, KASAI, Kunihiro, OKAYAMA, Yasunori, KAWASAKI, Hirohisa, ISOBE, Kazuaki, KANDA, Masahiko, ISHIMARU, Kazunari, ISHIUCHI, Hidemi

    Published 2002
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    Impact of parasitic resistance and silicon layer thickness scaling for strained-silicon MOSFETs on relaxed Si1-xGex virtual substrate

    Impact of parasitic resistance and silicon layer thickness scaling for strained-silicon MOSFETs on relaxed Si1-xGex virtual substrate by KAWASAKI, Hirohisa, OHUCHI, Kazuya, AOKI, Nobutoshi, KANEMURA, Takahisa, HAGISHNW, Daisuke, FUJIWARA, Makoto, INABA, Satoshi, ISHIRNARU, Kazunari, NAGASHIMA, Naoki, ISHIUCHI, Hidemi, OISHI, Amane, FUJII, Osamu, TSUJII, Hideji, ISHIDA, Tatsuya, KASAI, Kunihiro, OKAYAMA, Yasunori, KOJIMA, Kenji, ADACHI, Kanna

    Published 2004
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