Search Results - "Noyori, M."

Characteristics & Analysis of Instability Induced by Secondary Slow Trapping in Scaled CMOS Devices by Noyori, M., Yasui, J., Ishihara, T., Higuchi, H.

“…A new instability phenomenon in scaled CMOS devices has been observed. Threshold voltage shifts induced by this phenomenon in p and n-ch FETs are observed…”
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Comparisons of instabilities in scaled CMOS devices between plastic and hermetically encapsulated devices by Noyori, M., Nakata, Y., Shiragasawa, T.

“…Scaling down of transistor cell sizes causes some instabilities in CMOS devices under high temperature or high humidity bias stress, especially in plastic…”
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V(T)instabilities of scaled MOSFET''s with the top passivation structure composed of Silicon Nitride and silicate glass films by Noyori, M, Nakata, Y

“…This paper describes the threshold-voltage instability mechanism on scaled p-channel MOSFET's with the double-layer top passivation structure composed of…”
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V(T)instabilities of scaled MOSFET' s with the top passivation structure composed of Silicon Nitride and silicate glass films by Noyori, M, Nakata, Y

“…This paper describes the threshold-voltage instability mechanism on scaled p-channel MOSFET's with the double-layer top passivation structure composed of…”
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V T instabilities of scaled MOSFET's with the top passivation structure composed of Silicon Nitride and silicate glass films by Noyori, M., Nakata, Y.

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V sub(T) instabilities of scaled MOSFET's with the top passivation structure composed of silicon nitride and silicate glass films by Noyori, M, Nakata, Y

“…This paper describes the threshold-voltage instability mechanism on scaled p-channel MOSFET's with the double-layer top passivation structure composed of…”
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Comparison of instabilities in scaled CMOS devices between plastic and hermetically encapsulated devices by NOYORI, M, NAKATA, Y, SHIRAGASAWA, T

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VTinstabilities of scaled MOSFET's with the top passivation structure composed of Silicon Nitride and silicate glass films by Noyori, M., Nakata, Y.

“…This paper describes the threshold-voltage instability mechanism on scaled p-channel MOSFET's with the double-layer top passivation structure composed of…”
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A New Gate Length Dependent Threshold Voltage Instability in Plastic Encapsulated Scaled CMOS Devices by Noyori, M., Nakata, Y., Kuninobu, S.

“…In order to evaluate the reliability of plastic encapsulated scaled CMOS devices, accelerated tests have been conducted. As a result, a new gate length…”
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Reduction of VT Shift Due to Avalanche-Hot-Carrier Injection using Graded Drain Structures in Submicron N-Channel MOSFET by Noyori, M., Nakata, Y., Odanaka, S., Yasui, J.

“…In order to evaluate the VT shift due to hot-carriers in submicron n-channel FETs with several kinds of graded junction structures as compared with a…”
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Latch-Up Analysis on a 64K Bit Full CMOS Static RAM using a Laser Scanner by Shiragasawa, T., Shimura, H., Kagawa, K., Yonezawa, T., Noyori, M.

“…In order to quantitatively evaluate latch-up sensitivity on scaled CMOS LSIs, an advanced latch-up analyzer with a laser scanner has been developed. As a…”
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Secondary Slow Trapping - A New Moisture Induced Instability Phenomenon in Scaled Cmos Devices by Noyori, M., Ishihara, T., Higuchi, H.

“…A new instability phenomenon in scaled CMOS devices is presented. Threshold voltage shifts caused by this phenomenon are observed in negative gate bias…”
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