Search Results - "Noulis, T."

CMOS substrate coupling modeling and analysis flow for submicron SoC design by Noulis, T., Baumgartner, P.

“…CMOS technology substrate crosstalk modeling and a respective analysis flow that captures the affected circuit performance is described. The proposed…”
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Wide-band substrate crosstalk sensor for wireless SoC applications by Noulis, T., Merakos, P., Lourandakis, E., Stefanou, S., Moisiadis, Y.

“…•Substrate crosstalk sensing was performed in a 65nm CMOS ZigBee wireless communication SoC, using a novel CMOS differential architecture.•The proposed noise…”
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Advanced Low-Noise X-Ray Readout ASIC for Radiation Sensor Interfaces by Noulis, T., Siskos, S., Sarrabayrouse, G., Bary, L.

“…A VLSI readout front-end architecture, dedicated for X-ray imaging, using specific capacitive silicon detectors, with capacitance ranging from 2 to 10 pF, is…”
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CMOS substrate RC netlist reduction towards design cycle speed up by Karipidis, S., Noulis, T.

“…Integrated circuit substrate crosstalk is an effect with significant impact on design cycle and silicon success. Its accurate simulation comprises a…”
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A Quantitative Phase Noise Study of VCOs from RF to Millimeter Wave Frequencies by Chatzigeorgiou, S., Michailidis, A., Gogolou, V., Noulis, T.

“…This paper presents an analysis of phase and jitter noise in crossed-coupled voltage-controlled oscillators (VCOs). The topology under test was designed using…”
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Charge-Sensitive Amplifiers: Technology Scaling Impact on Noise Performance by Gogolou, V., Lemonou, A., Noulis, T., Dingfelder, J.

“…In this work, the folded cascode and the inverter based charge-sensitive amplifier topologies are evaluated across four diverse technology nodes, from 22 nm to…”
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Compact Ground Bounce Sensors for SoC Energy Harvesting Applications by Moustakas, K., Noulis, T., Siskos, S.

“…In this work, the energy harvesting system on chip ground bounce monitoring is addressed, by designing and comparing three ground bounce sensors. Special focus…”
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Comparison between BSIM4.X and HSPICE flicker noise models in NMOS and PMOS transistors in all operating regions by Noulis, T., Siskos, S., Sarrabayrouse, G.

“…In this paper, BSIM4.X and HSPICE flicker noise models are analytically examined and directly compared to noise measurements, using NMOS and PMOS devices…”
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Curvature Compensated and Noise Optimized Bandgap Reference Circuit by Lemonou, A., Sidiropoulos, I., Axiotis, T., Noulis, T., Dingfelder, J.

“…A current-mode Bandgap Reference (BGR) circuit has been designed using 65 nm process technology. The design aimed to achieve a voltage reference (V REF ) of…”
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A 4-bit 28-GS/s 4×Time-Interleaved Current-Steering DAC for High-Speed Interfacing by Michailidis, A., Noulis, T., Pavlidis, V. F., Hatzopoulos, A.

“…In this work, a fully integrated 4-bit current-steering DAC was implemented into silicon using a 22nm SoI CMOS process node. By exploiting the time-interleaved…”
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MOSFET Model Parameter Extraction Using Reinforcement Learning by Papageorgiou, E., Alia, G., Buzo, A., Pelz, G., Noulis, T.

“…As the field of modeling and simulation continues to evolve, the demand for more accurate and complex models has grown. The increased complexity of these…”
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Analysis and selection criteria of BSIM4 flicker noise simulation models by Noulis, T., Siskos, S., Sarrabayrouse, G.

“…CMOS transistors' noise performance is mainly dominated by flicker (1/f) noise. BSIM4.X MOSFET simulation model develops two distinct models, SPICE‐Flicker and…”
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Crosstalk Impact on CMOS Low Noise Amplifiers from RF to millimeter Wave by Themeli, R., Zachos, N., Noulis, T., Pavlidis, V. F., Hatzopoulos, A.

“…This work addresses crosstalk effects on three low noise amplifiers (LNAs) operating at different frequency bands, the S-band (2.4 GHz), the Ka-band (28 GHz),…”
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Netlist Compaction IR Drop Simulation Flow for Mixed Signal Power Integrity Analysis by Michailidis, A., Topalidis, E., Noulis, T., Pavlidis, V. F., Hatzopoulos, A.

“…In this work, a novel netlist compaction methodology was proposed and exploited as to speed-up the power integrity simulations of mixed signal SoC. The…”
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A Python Framework for System-on-Chip Power Integrity Simulation by Panagiotopoulou, C., Michailidis, A., Noulis, T., Siozios, K., Siskos, S.

“…An innovative power integrity simulation methodology is proposed in this work, using open-source simulators as to simulate the power drop across the power…”
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Design guidelines and comparison of detector readout front end integrated S-G shapers using transconductance circuits by Noulis, T., Deradonis, C., Siskos, S.

“…An analysis of readout front end electronics semi-gaussian (S-G) shapers is carried out. Innovative design methodology is proposed and an advanced filter…”
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Power Analysis Methodology for Energy Harvesting System on Chip by Panagiotopoulou, C., Michailidis, A., Gogolou, V., Noulis, T., Siozios, K., Siskos, S.

“…In this work, a novel power analysis methodology is proposed, aiming to successful simulation and accurate power drop analysis of fully integrated energy…”
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Machine Learning based Power Converter Large Signal Simulation for Energy Harvesting Applications by Vergos, G., Gogolou, V., Panagiotopoulou, C., Avgoustidis, A., Noulis, T., Siozios, K., Siskos, S.

“…Machine learning (ML) algorithms are utilized for the implementation of a ML python-based model of dynamic behavior of Power DC - DC converters, for energy…”
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High frequency RFCMOS substrate noise sensor by Moustakas, K., Noulis, T., Siskos, S.

“…A substrate crosstalk sensor featuring high performance gain over a wide frequency range is proposed. The topology is used as high frequency crosstalk noise…”
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Simulation of substrate coupling for mobile communications SoC – A 20 GHz VCO case study by Karipidis, S., Voulkidou, A., Michailidis, A., Noulis, T.

“…An innovative substrate coupling simulation methodology with on-the-fly extraction and validation of CMOS substrate parasitic elements, combining boundary…”
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