Search Results - "Nesam, J. Jean Jenifer"

Truncated Multiplier with Delay-Minimized Exact Radix-8 Booth Recoder Using Carry Resist Adder by Nesam, J. Jean Jenifer, Ganesh, S. Sankar

“…The delay owing to the generation of odd multiples ( ± 3 ) in Radix-8 Booth recoding is minimized in this paper using carry resist adder (CRA). CRA is…”
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Effect of bit-size reduced half-precision floating-point format on image pixel characterization for AI applications by Nesam, J. Jean Jenifer, Ganesh, S. Sankar, Ramachandran, Sitharthan

“…Image processing is an essential first step towards fully utilizing robotics, deep learning, and machine learning techniques. Using techniques like image…”
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Efficient half-precision floating point multiplier targeting color space conversion by Nesam, J. Jean Jenifer, Sivanantham, S.

“…Color Space Conversion (CSC) in image processing applications, demands computationally simple floating point multipliers consuming less area and power. This…”
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Optimizing RGB to Grayscale, Gaussian Blur and Sobel-Filter operations on FPGAs for reduced dynamic power consumption by Rout, Nikhil, Jean Jenifer Nesam, J

“…The conversion of pixels from their RGB to Grayscale formats is a crucial first step in numerous Image Pre-Processing, Computer Vision, and as highlighted…”
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High Speed Half-Precision Floating-Point Fused Multiply and Add Unit Using DSP Blocks by Ganesh, S Sankar, Nesam, J Jean Jenifer, Subramaniam, Umashankar

“…Necessity of multiplication followed by the addition in numerous digital signal processing applications demands Fused Multiply and Add (FMA) unit for…”
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An area-efficient 32-bit floating point multiplier using hybrid GPPs addition by Nesam, J. Jean Jenifer, Sivanantham, S.

“…In this paper, we proposed a new design of hybrid adder for area-efficient 32-bit floating point multiplier. By combining conventional ripple carry adder (RCA)…”
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