Search Results - "Neidengard, M."
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1
Next Generation Intel¯ Core™ Micro-Architecture (Nehalem) Clocking
Published in IEEE journal of solid-state circuits (01-04-2009)“…This paper describes the core and I/O clocking architecture of the next generation Intel reg Coretrade micro-architecture processor (Nehalem), designed on a 45…”
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2
Hysteretic threshold logic and quasi-delay insensitive asynchronous design
Published in IEEE transactions on circuits and systems. 1, Fundamental theory and applications (01-10-2002)“…We introduce the class of hysteretic linear-threshold (HLT) logic functions as a novel extension of linear threshold logic, and prove their general…”
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Journal Article -
3
Next Generation IntelA= Coreac Micro-Architecture (Nehalem) Clocking
Published in IEEE journal of solid-state circuits (01-01-2009)“…This paper describes the core and I/O clocking architecture of the next generation Intel super(reg) Coretrade micro-architecture processor (Nehalem), designed…”
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Journal Article