Search Results - "Neeraj, Kaushal Kumari"
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A Zero-Cost Technique to Improve ON-State Performance and Reliability of Power LDMOS Transistors
Published in IEEE journal of the Electron Devices Society (2021)“…In this paper, we have proposed a simple and zero-cost technique to improve ON-state and reliability performance of LDMOS transistors. We introduced doping…”
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Journal Article -
2
A Physics-Based Compact Model to Capture Cryogenic Behavior of LDMOS Transistors
Published in IEEE transactions on electron devices (01-03-2023)“…In this work, a detailed characterization of lateral DMOS transistors in the cryogenic regime is carried out. It is shown that carrier freeze-out in the drift…”
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Journal Article -
3
Scalable Substrate Current Model for LDMOS Transistors Based on Internal Drain Voltage
Published in IEEE transactions on electron devices (01-08-2022)“…In this work, a scalable robust substrate current model for laterally diffused MOS (LDMOS) transistors is presented. The model is created in two stages. First,…”
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Journal Article -
4
Unified Theory of the Capacitance Behavior in LDMOS Devices
Published in IEEE transactions on electron devices (01-01-2022)“…This article reviews and provides physical insights into the anomalous capacitance behavior of laterally diffused MOS (LDMOS) transistors. It is shown that the…”
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Journal Article -
5
Compact Modeling of LDMOS Transistors Over a Wide Temperature Range Including Cryogenics
Published in IEEE transactions on electron devices (01-01-2024)“…An improved compact model of high-voltage laterally diffused MOS (LDMOS) transistors valid over a wide temperature range including cryogenic is presented. The…”
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Journal Article -
6
Source Underlap-A Novel Technique to Improve Safe Operating Area and Output-Conductance in LDMOS Transistors
Published in IEEE transactions on electron devices (01-11-2019)“…In this article, we have proposed a simple, novel, and cost-effective technique to mitigate the ON-state performance issues in laterally diffused MOS (LDMOS)…”
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Journal Article -
7
Behavior of LDMOS transistors at cryogenic temperature - An experiment based analysis
Published in 2021 25th International Symposium on VLSI Design and Test (VDAT) (16-09-2021)“…In this work, LDMOS transistors with different drift length and drift doping are characterized at cryogenic temperature. The physics behind the LDMOS…”
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Conference Proceeding -
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Physics-based parameter extraction methodology for channel doping gradient (CDG) LDMOS transistors based on HiSIM-HV2 model
Published in 2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) (08-04-2021)“…A physics-based parameter extraction methodology based on HiSIM-HV2 model is developed to capture the effect of CDG on the performance of LDMOS transistors…”
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Conference Proceeding