Search Results - "Nedjah, N."

Dynamic MAC-based architecture of artificial neural networks suitable for hardware implementation on FPGAs by Nedjah, N., da Silva, R.M., Mourelle, L.M., da Silva, M.V.C.

“…Artificial neural networks (ANNs) is a well known bio-inspired model that simulates human brain capabilities such as learning and generalization. ANNs consist…”
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Migration selection of strategies for parallel genetic algorithms: implementation on networks on chips by Mourelle, L., Ferreira, R. E., Nedjah, N.

“…The aim of the work described in this article is to investigate migration strategies for the execution of parallel genetic algorithms in a multi-processor…”
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Three hardware architectures for the binary modular exponentiation: sequential, parallel, and systolic by Nedjah, N., Mourelle, Ld.M.

“…Modular exponentiation is the cornerstone computation in public-key cryptography systems such as RSA cryptosystems. The operation is time consuming for large…”
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Power-aware multi-objective evolutionary optimisation for application mapping on network-on-chip platforms by da Silva, M. V.C., Nedjah, N., Mourelle, L. M.

“…Network-on-chip (NoC) is considered the next generation of communication infrastructure, which will be omnipresent in different environments. In the…”
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Reconfigurable and adaptive computing by Nedjah, N., Wang, C.

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Efficient yet robust biometric iris matching on smart cards for data high security and privacy by Nedjah, N., Wyant, R.S., Mourelle, L.M., Gupta, B.B.

“…Smart control access to any service and/or critical data is at the very basis of any smart project. Biometrics have been used as a solution for system access…”
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Three hardware implementations for the binary modular exponentiation: sequential, parallel and systolic by Nedjah, N., de Macedo Mourelle, L.

“…Modular exponentiation is the cornerstone computation performed in public-key cryptography systems such as the RSA cryptosystem. The operation is time…”
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Congestion-aware ant colony based routing algorithms for efficient application execution on Network-on-Chip platform by Nedjah, Nadia, Silva Junior, Luneque, de Macedo Mourelle, Luiza

“…•Two novel congestion-aware algorithms based on ACO adapted to the routing problem.•An adaptive and static routing.•The proposed algorithms overcome the…”
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Migration selection of strategies for parallel genetic algorithms: implementation on networks on chips : Evolutionary synthesis of network-on-chip-based systems by MOURELLE, L, FERREIRA, R. E, NEDJAH, N

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Stochastic reconfigurable hardware for neural networks by Nedjah, N., de Macedo Mourelle, L.

“…In this paper, we propose reconfigurable, low-cost and readily available hardware architecture for an artificial neuron. This is used to build a feed-forward…”
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Two hardware implementations for the Montgomery modular multiplication: sequential versus parallel by Nedjah, N., de Macedo Mourelle, L.

“…Modular multiplication is the most dominant part of the computation performed in public-key cryptography systems such as the RSA cryptosystem. The operation is…”
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Special issue of International Journal of Electronics on evolutionary synthesis of network-on-chip-based systems by Nedjah, N., Bouchachia, A. H., Mourelle, L. M.

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A reconfigurable recursive and efficient hardware for Karatsuba-Ofman's multiplication algorithm by Nedjah, N., de Macedo Mourelle, L.

“…Multiplication of long integers is a cornerstone primitive in most public-key cryptosystems. Multiplication for big numbers can be performed best using…”
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Massively parallel hardware architecture for genetic algorithms by Nedjah, N., de Macedo Mourelle, L.

“…In this paper, we propose a massively parallel architecture for hardware implementation of genetic algorithms. This is design is quite innovative as it…”
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Reconfigurable hardware for addition chains based modular exponentiation by de Macedo Mourelle, L., Nedjah, N.

“…In several public-key cryptosystems, the main operation consists of the modular exponentiation, which is performed using successive modular multiplications…”
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Efficient cryptographic hardware using the co-design methodology by de Macedo Mourelle, L., Nedjah, N.

“…Most cryptography systems are based on the modular exponentiation to perform the nonlinear scrambling operation of data. It is performed using successive…”
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FPGA-based hardware architecture for neural networks: binary radix vs. stochastic by Nedjah, N., Mourelle, Lde.M.

“…This paper is focused on the hardware implementation of neural networks. It describes the characteristics of two architectures designed to implement…”
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Evolutionary time scheduling by Nedjah, N., de Macedo Mourelle, L.

“…Genetic algorithms are generally used to solve NP-complete problems, which include scheduling problem in academic institutions. Scheduling consists of…”
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Pareto-optimal hardware for substitution boxes by Nedjah, N., de Macedo Mourelle, L.

“…In this paper, we propose a methodology based on genetic programming to automatically generate hardware designs of substitution boxes necessary for many…”
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Multi-objective evolutionary hardware for RSA-based cryptosystems by Nedjah, N., de Macedo Mourelle, L.

“…We propose a methodology based on genetic programming to automatically generate data-flow based specifications for hardware designs of public-key cryptosystems…”
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