Search Results - "Nazario, Rafael Arce"
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Multidimensional Costas Arrays and Their Enumeration Using GPUs and FPGAs
Published in International journal of reconfigurable computing (01-01-2012)“…The enumeration of two-dimensional Costas arrays is a problem with factorial time complexity and has been solved for sizes up to 29 using computer clusters…”
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Journal Article -
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New families of balanced symmetric functions and a generalization of Cusick, Li and Stǎnicǎ’s conjecture
Published in Designs, codes, and cryptography (01-03-2018)“…In this paper we provide new families of balanced symmetric functions over any finite field. We also generalize a conjecture of Cusick, Li, and Stǎnicǎ about…”
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Journal Article -
3
Algebraic Symmetries of Generic (m+1)-Dimensional Periodic Costas Arrays
Published in IEEE transactions on information theory (01-02-2013)“…In this paper, we present two generators for the group of symmetries of the generic ( m +1) -dimensional periodic Costas arrays over elementary abelian (\BBZ p…”
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Journal Article -
4
Mapping of Discrete Cosine Transforms onto Distributed Hardware Architectures
Published in Journal of signal processing systems (01-12-2008)“…We present an algorithmically-aware, high-level partitioning methodology for discrete cosine transforms (DCT) targeted to distributed hardware architectures…”
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Journal Article -
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Reconfigurable Hardware Implementation of a Multivariate Polynomial Interpolation Algorithm
Published in International journal of reconfigurable computing (01-01-2010)“…Multivariate polynomial interpolation is a key computation in many areas of science and engineering and, in our case, is crucial for the solution of the…”
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Journal Article -
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Multidimensional linear complexity analysis of periodic arrays
Published in Applicable algebra in engineering, communication and computing (2020)“…The linear complexity of a sequence is an important parameter for many applications, especially those related to information security, and hardware…”
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Journal Article -
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Implementing an informal and culturally relevant computer science curriculum in a predominantly Hispanic-Spanish speaking community
Published in 2023 Conference on Research in Equitable and Sustained Participation in Engineering, Computing, and Technology (RESPECT) (20-06-2023)“…Remezcla introduces computer programming to Hispanic students through an informal and culturally relevant curriculum. This report highlights the trials and…”
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Conference Proceeding -
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Equity Pedagogies in CSed: A Critical-Sociocultural and Humanizing Perspective for Latinx Youth
Published in 2023 Conference on Research in Equitable and Sustained Participation in Engineering, Computing, and Technology (RESPECT) (20-06-2023)“…This perspective paper positions computer science education (CSed) equity pedagogies within a critical-sociocultural and humanizing theoretical framework with…”
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Conference Proceeding -
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High-level partitioning of discrete signal transforms for distributed hardware architectures
Published 01-01-2007“…Discrete signal transforms (DSTs) have numerous applications in a wide spectrum of scientific fields. To attain superior performance, the size and composition…”
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Dissertation -
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Partitioning exploration for automated mapping of discrete cosine transforms onto distributed hardware architectures
Published in 2007 50th Midwest Symposium on Circuits and Systems (01-08-2007)“…A high-level partitioning methodology has been reported which explores the space of equivalent discrete Fourier transform formulations, achieving significant…”
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Conference Proceeding -
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High-level partitioning of discrete signal transforms for distributed hardware architectures
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Dissertation -
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Modules to Teach Parallel and Distributed Computing Using MPI for Python and Disco
Published in 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) (01-05-2016)“…The ability to design effective solutions using parallel processing should be a required competency for every computing student. However, teaching parallel…”
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Conference Proceeding -
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An assessment of high-level partitioning techniques for implementing discrete signal transforms on distributed hardware architectures
Published in 48th Midwest Symposium on Circuits and Systems, 2005 (2005)“…Partitioning is an essential step in the implementation of algorithms to distributed hardware architectures (DHAs) such as multi-FPGA boards. While numerous…”
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Conference Proceeding -
14
Functionally-aware Partitioning of Discrete Signal Transforms for Distributed Hardware Architectures
Published in 2006 49th IEEE International Midwest Symposium on Circuits and Systems (01-08-2006)“…A high-level partitioning methodology is introduced, which uses formulation-level discrete signal transform properties to provide improved results for their…”
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Conference Proceeding -
15
Enumeration of Costas Arrays Using GPUs and FPGAs
Published in 2011 International Conference on Reconfigurable Computing and FPGAs (01-11-2011)“…The enumeration of Costas arrays is a problem that grows factorially with input size and that has lately been completed for sizes up to 28 using computer…”
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Conference Proceeding -
16
Algebraic symmetries of generic $(m+1)$ dimensional periodic Costas arrays
Published 29-05-2012“…In this work we present two generators for the group of symmetries of the generic $(m+1)$ dimensional periodic Costas arrays over elementary abelian…”
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Journal Article -
17
Integer pair representation for multiple-output logic
Published in 2003 46th Midwest Symposium on Circuits and Systems (2003)“…Integer pair representation for multiple-output (IPR-M), an efficient cube-based method for the representation and manipulation of multiple-output binary…”
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Conference Proceeding -
18
A Systolic Array Based Architecture for Implementing Multivariate Polynomial Interpolation Tasks
Published in 2009 International Conference on Reconfigurable Computing and FPGAs (01-12-2009)“…Multivariate polynomial interpolation is a key computation for the reverse engineering of genetic networks modeled by finite fields. Faster implementations of…”
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Conference Proceeding -
19
Effects of High-Level Discrete Signal Transform Formulations on Partitioning for Multi-FPGA Architectures
Published in 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (01-04-2006)“…The achievement of effective implementations to multi-FPGA architectures is greatly dependent on the process of partitioning. Although several automated…”
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Conference Proceeding -
20
High-Level Partitioning of Discrete Signal Transforms for Multi-FPGA Architectures
Published in 2006 International Conference on Field Programmable Logic and Applications (01-08-2006)“…This paper introduces a high-level partitioning methodology which uses formulation-level discrete signal transform properties to provide improved results for…”
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Conference Proceeding