Search Results - "Nauta, B"
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1
Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference
Published in IEEE journal of solid-state circuits (01-12-2009)“…A software-defined radio (SDR) receiver with improved robustness to out-of-band interference (OBI) is presented. Two main challenges are identified for an…”
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2
Wide-band CMOS low-noise amplifier exploiting thermal noise canceling
Published in IEEE journal of solid-state circuits (01-02-2004)“…Known elementary wide-band amplifiers suffer from a fundamental tradeoff between noise figure (NF) and source impedance matching, which limits the NF to values…”
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3
Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification
Published in IEEE journal of solid-state circuits (01-05-2011)“…A differential single-port switched-RC N-path filter with band-pass characteristic is proposed. The switching frequency defines the center frequency, while the…”
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Journal Article Conference Proceeding -
4
A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by N
Published in IEEE journal of solid-state circuits (01-12-2009)“…This paper presents a 2.2-GHz low jitter sub-sampling based PLL. It uses a phase-detector/charge-pump (PD/CP) that sub-samples the VCO output with the…”
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5
Tunable N-Path Notch Filters for Blocker Suppression: Modeling and Verification
Published in IEEE journal of solid-state circuits (01-06-2013)“…N-path switched-RC circuits can realize filters with very high linearity and compression point while they are tunable by a clock frequency. In this paper, both…”
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6
Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling
Published in IEEE journal of solid-state circuits (01-06-2008)“…An inductorless low-noise amplifier (LNA) with active balun is proposed for multi-standard radio applications between 100 MHz and 6 GHz. It exploits a…”
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7
Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops
Published in IEEE transactions on circuits and systems. II, Express briefs (01-02-2009)“…This brief analyzes the jitter as well as the power dissipation of phase-locked loops (PLLs). It aims at defining a benchmark figure-of-merit (FOM) that is…”
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8
Analog circuits in ultra-deep-submicron CMOS
Published in IEEE journal of solid-state circuits (01-01-2005)“…Modern and future ultra-deep-submicron (UDSM) technologies introduce several new problems in analog design. Nonlinear output conductance in combination with…”
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9
Analytical Design Equations for Class-E Power Amplifiers
Published in IEEE transactions on circuits and systems. I, Regular papers (01-12-2007)“…This paper presents the analytical solution in time domain for the ideal single-ended class-E power amplifier (PA). Based on the analytical solution a coherent…”
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10
The Blixer, a Wideband Balun-LNA-I/Q-Mixer Topology
Published in IEEE journal of solid-state circuits (01-12-2008)“…This paper proposes to merge an I/Q current-commutating mixer with a noise-canceling balun-LNA. To realize a high bandwidth, the real part of the impedance of…”
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Journal Article Conference Proceeding -
11
Low-Power, High-Speed Transceivers for Network-on-Chip Communication
Published in IEEE transactions on very large scale integration (VLSI) systems (01-01-2009)“…Networks on chips (NoCs) are becoming popular as they provide a solution for the interconnection problems on large integrated circuits (ICs). But even in a…”
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12
A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios
Published in IEEE journal of solid-state circuits (01-07-2009)“…The design of a 100 kHz frequency reference based on the electron mobility in a MOS transistor is presented. The proposed low-voltage low-power circuit…”
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13
A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication
Published in IEEE journal of solid-state circuits (01-08-2005)“…This paper presents a monolithic optical detector, consisting of an integrated photodiode and a preamplifier in a standard 0.18-/spl mu/m CMOS technology. A…”
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14
A CMOS transconductance-C filter technique for very high frequencies
Published in IEEE journal of solid-state circuits (01-02-1992)“…CMOS circuits for integrated analog filters at very high frequencies, based on transconductance-C integrators, are presented. First a differential…”
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15
A Wideband Supply Modulator for 20 MHz RF Bandwidth Polar PAs in 65 nm CMOS
Published in IEEE journal of solid-state circuits (01-04-2009)“…Polar modulated RF amplifiers have the potential to enhance efficiency while achieving sufficient linearity for a signal having non-constant envelope. However,…”
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16
Reducing MOSFET 1/f noise and power consumption by switched biasing
Published in IEEE journal of solid-state circuits (01-07-2000)“…Switched biasing is proposed as a technique for reducing the 1/f noise in MOSFET's. Conventional techniques, such as chopping or correlated double sampling,…”
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17
A CMOS switched transconductor mixer
Published in IEEE journal of solid-state circuits (01-08-2004)“…A new CMOS active mixer topology can operate at low supply voltages by the use of switches exclusively connected to the supply voltages. Such switches require…”
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18
In-band full-duplex transceiver technology for 5G mobile networks
Published in ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC) (01-09-2015)“…In-band full-duplex is a promising air interface technique to tackle several of the key challenges of next generation (5G) mobile networks. Simultaneous…”
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Conference Proceeding Journal Article -
19
A software-defined radio receiver architecture robust to out-of-band interference
Published in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01-02-2009)“…In a software-defined radio (SDR) receiver it is desirable to minimize RF band-filtering for flexibility, size and cost reasons, but this leads to increased…”
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Conference Proceeding -
20
Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation
Published in IEEE transactions on circuits and systems. II, Express briefs (01-03-2008)“…In this paper, we compare a shift register (SR) to a delay-locked loop (DLL) for flexible multiphase clock generation, and motivate why a SR is not only more…”
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