Search Results - "Narum, D.H."

Electron velocity saturation in heterostructure field-effect transistors by Han, C.-J., Ruden, P.P., Nohava, T.E., Narum, D.H., Grider, D.E., Newstrom, K., Joslyn, P., Shur, M.S.

“…Results on gate-length scaling of the performance of enhancement-mode heterostructure field-effect transistors (HFETs) for gate lengths of between 0.4 and 10…”
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A self-aligned gate III-V heterostructure FET process for ultrahigh-speed digital and mixed analog/digital LSI/VLSI circuits by Akinwande, A.I., Ruden, P.P., Vold, P.J., Han, C.-J., Grider, D.E., Narum, D.H., Nohava, T.E., Nohava, J.C., Arch, D.K.

“…A planar ion-implanted self-aligned gate process for the fabrication of high-speed digital and mixed analog/digital LSI/VLSI integrated circuits is reported. A…”
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A high performance (Al,Ga)As/GaAs MODFET butterfly adder chip for FFT computation by Akinwande, A.I., Betz, B.K., MacTaggart, I.R., Grider, D.E., Narum, D.H., Lange, T.H., Nohava, T.E., Nohava, J.C., Tetzlaff, D., Arch, D.K.

“…A report is presented on a butterfly adder chip for high-speed computation of fast Fourier transforms (FFTs). It was fabricated using a 1- mu m self-aligned…”
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New techniques for modeling focused ion beams by Narum, D. H., Pease, R. F. W.

“…Monte Carlo computer simulations of e‐beam systems have proven quite successful in determining the contribution of mutual particle repulsion to critical beam…”
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