Search Results - "Nakandakare, Cleber"

A comparison of Phase Locked Loop and FIFO Locked Loop by Bassan, Fabio R., Akira Nakandakare, Cleber, de Barros, Luis Paulo F., Rocha Pereira, Fernando, Salvador, Arley

“…In this paper we present a comparison of two methods to control the reading frequency of a First In First Out (FIFO) memory. The first method is based on the…”
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100Gbit/s FEC for OTN protocol: Design architecture and implementation results by Salvador, Arley, Carvalho, Diego, Nakandakare, Cleber, Mobilon, Eduardo, de Oliveira, Julio C., Arantes, Dalton S.

“…Error correcting codes are widely used in telecommunication systems in order to increase the robustness of the system. With the exponential growth of the data…”
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Architecture and FPGA implementation of a 10.7 Gbit/s OTN Regenerator for optical communication systems by Bernardo, R., Monte, L. R., Mobilon, E., Corso, V., Salvador, A. H., Neves, C. G., Nakandakare, C. A., da Silva, Daniele R., de Barros, L. P. F., da Silva, R. F.

“…As the newest FPGA technologies provide high operating frequencies, in conjunction with serializer/deserializer hardwired modules enabling the operation of…”
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