Search Results - "Murfet, P."
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A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization
Published in IEEE journal of solid-state circuits (01-12-2005)“…A 4.9-6.4-Gb/s two-level SerDes ASIC I/O core employing a four-tap feed-forward equalizer (FFE) in the transmitter and a five-tap decision-feedback equalizer…”
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Journal Article -
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A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
Published in ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005 (2005)“…A 4.9 to 6.4 Gb/s 2-level SerDes ASIC I/O core designed in 0.13 /spl mu/m CMOS uses a 4-tap FFE in the transmitter and a 5-tap DFE with receiver AGC…”
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Conference Proceeding