Search Results - "Murdoch, Gayle"
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1
Cu passivation for integration of gap-filling ultralow-k dielectrics
Published in Applied physics letters (05-12-2016)“…For Cu/low-k interconnects, the reversed damascene is an alternative integration approach where the metal wires are patterned first and then the spacing filled…”
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Journal Article -
2
Controlled cobalt recess for advanced interconnect metallization
Published in Microelectronic engineering (15-09-2019)“…We have developed a wet chemical etch process for the controlled recess of cobalt metal based on ‘digital etching’. Digital etching is a cyclic process wherein…”
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Journal Article -
3
Integration and manufacturing aspects of moving from WaferBOND HT-10.10 to ZoneBOND material in temporary wafer bonding and debonding for 3D applications
Published in 2013 IEEE 63rd Electronic Components and Technology Conference (01-05-2013)“…Among the technological developments pushed by the emergence of 3D Stacked IC technologies, temporary wafer bonding has become a key element in device…”
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Conference Proceeding -
4
Impact of via density and passivation thickness on the mechanical integrity of advanced Back-End-Of-Line interconnects
Published in Microelectronics and reliability (01-12-2017)“…The influence of via density and passivation thickness on the mechanical integrity of Back-End-Of-Line (BEOL) interconnects under Chip Package Interaction…”
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Journal Article -
5
Redefining 2-Level Semi-Damascene Interconnect Technology: Benchmarking three different Fully Self-aligned Via options
Published in Proceedings of the IEEE International Interconnect Technology Conference (03-06-2024)“…This study highlights the effectiveness of a novel two-metal-level semi-damascene integration approach using fully self-aligned pillar-vias (FSAV) for…”
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Conference Proceeding -
6
Airgap Integration in MP18 Two-Level Semi-damascene Interconnects with Fully Self-aligned Vias
Published in Proceedings of the IEEE International Interconnect Technology Conference (03-06-2024)“…Airgap integration in 18 to 26 nm metal pitch (MP) two-metal level semi-damascene interconnects with fully self-aligned vias (FSAV) on 300 mm wafers is…”
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Conference Proceeding -
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Demonstration of MP18-26nm Ru Semi-Damascene Spacer-is-Dielectric SADP Integration
Published in Proceedings of the IEEE International Interconnect Technology Conference (03-06-2024)“…This work presents a novel Spacer-is-Dielectric (SID) SADP Ru semi-damascene integration scheme by using metal-based core and gap hard masks. More than 70%…”
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Conference Proceeding -
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MP18-26 Ru Direct-Etch Integration Development with Leakage Improvement and Increased Aspect Ratio
Published in 2022 IEEE International Interconnect Technology Conference (IITC) (27-06-2022)“…Ru semi-damascene has been recently considered as a promising candidate to replace the conventional Cu dual damascene to meet the continued RC scaling needs in…”
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Conference Proceeding -
9
Subtractive Etch of Ruthenium for Sub-5nm Interconnect
Published in 2018 IEEE International Interconnect Technology Conference (IITC) (01-06-2018)“…Ruthenium has been recently considered as a promising candidate to replace copper as the BEOL interconnect material for sub-5nm technology nodes. In this work,…”
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Conference Proceeding -
10
Two Metal Level Semi-Damascene Interconnects for Superconducting Digital Logic
Published in Proceedings of the IEEE International Interconnect Technology Conference (03-06-2024)“…In this paper we present a superconducting two-metal level (2ML) BEOL unit process based on Nb x Ti (1-x) N (NbTiN) that was developed in imec's 300 mm pilot…”
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Conference Proceeding -
11
Semidamascene Interconnects for 2nm node and Beyond
Published in 2020 IEEE International Interconnect Technology Conference (IITC) (05-10-2020)“…In this paper we present a semidamascene integration approach for interconnect devices as an alternative to dual damascene. A Ru layer is deposited to fill…”
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Conference Proceeding -
12
Two-level Semi-damascene interconnect with fully self-aligned Vias at MP18
Published in 2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM) (01-05-2023)“…We present the functionality of a semi-damascene integration scheme with fully self-aligned vias (FSAV) for interconnects varying 26 to 18nm metal pitch, using…”
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Conference Proceeding -
13
Two-metal-level semi-damascene interconnect at metal pitch 18 nm and aspect-ratio 6 routed using fully self-aligned via
Published in 2023 International Electron Devices Meeting (IEDM) (09-12-2023)“…High-aspect ratio (HAR-6-8) bottom Ru metal lines (M2), at CDs 7-10 nm and metal pitch (MP) 18-26 nm, in a two-metal level Ru semi-damascene interconnect…”
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Conference Proceeding -
14
Feasibility study of fully self aligned vias for 5nm node BEOL
Published in 2017 IEEE International Interconnect Technology Conference (IITC) (01-05-2017)“…In this paper we present the concept of the Fully Self Aligned Via (FSAV) with motivation of achieving manufacturable litho process windows for patterning vias…”
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Conference Proceeding -
15
Barrierless ALD Molybdenum for Buried Power Rail and Via-to-Buried Power Rail metallization
Published in 2022 IEEE International Interconnect Technology Conference (IITC) (27-06-2022)“…This work reports for the first time, a middle-of-line (MOL) compatible, barrier/liner-less ALD molybdenum (Mo) process on SiO 2 used for…”
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Conference Proceeding -
16
Impact of Via Density on the Mechanical Integrity of Advanced Back-End-of-Line During Packaging
Published in 2016 IEEE 66th Electronic Components and Technology Conference (ECTC) (01-05-2016)“…The influence of via density on the mechanical integrity of Back-End-Of-Line (BEOL) interconnects under Chip Package Interaction (CPI) loading is evaluated…”
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Conference Proceeding -
17
Selective co growth on Cu for void-free via fill
Published in 2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM) (01-05-2015)“…We report for the first time a highly selective CVD Co deposition on Cu to fill a 45nm diameter 3:1 aspect ratio via in a Cu dual damascene structure. We have…”
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Conference Proceeding