Search Results - "Mrcarica, Zeljko"

ESD protection for thin gate oxides in 65 nm by Notermans, Guido, Smedes, Theo, Mrčarica, Željko, Jong, Peter de, Stephan, Ralph, Zwol, Hans van, Maksimovic, Dejan

“…Unexpected functional failures were found in the core of an IC, processed in a 65 nm technology with 1.8 nm gate oxide, after Machine Model (MM) testing,…”
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Distributed control based on distributed electronic circuits: application to vibration control by Kader, Mahamane, Lenczner, Michel, Mrcarica, Zeljko

“…This paper focuses on the design of distributed control related to distributed mechanical systems. The sensors and actuators are assumed to be numerous and…”
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ESD robust high-voltage active clamps : Electrostatic Discharge Reliability by NOTERMANS, Guido, QUITTARD, Olivier, HERINGA, Anco, MRCARICA, Zeljko, BLANC, Fabrice, VAN ZWOL, Hans, SMEDES, Theo, KELLER, Thomas, DE JONG, Peter

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ESD robust high-voltage active clamps by Notermans, Guido, Quittard, Olivier, Heringa, Anco, Mrčarica, Željko, Blanc, Fabrice, Zwol, Hans van, Smedes, Theo, Keller, Thomas, Jong, Peter de

“…Using circuit simulation extended by a proper failure criterion, the HBM and TLP robustness of high-voltage clamps can be accurately predicted without the need…”
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Electro-thermal simulation of microsystems with mixed abstraction modelling by Jakovljevic, Mirko, Fotiu, Peter A., Mrcarica, Zeljko, Litovski, Vanco, Detter, Helmut

“…Electro-thermal coupling is only one aspect of numerous interactions between physical domains in microsystems. Different physical effects govern the…”
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Transient electro-thermal simulation of microsystems with space-continuous thermal models in an analogue behavioural simulator by Jakovljevic, Mirko, Mrcarica, Zeljko, Fotiu, Peter A., Detter, Helmut, Litovski, Vanco

“…In many microsystems (MEMS), thermal effects have significant importance and system-level electro-thermal simulation is needed to shorten the product…”
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Time-domain analysis of nonlinear switched networks with internally controlled switches by Mrcarica, Z., Ilic, T., Litovski, V.B.

“…The paper describes a new model of an ideal switch, which can be used in standard circuit simulation algorithms. There are no restrictions on network topology…”
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Gate oxide protection and ggNMOSTs in 65 nm by Notermans, G., Smedes, T., Mrcarica, Z., de Jong, P., Stephan, R., van Zwol, H., Maksimovic, D.

“…Unexpected functional failures were found in the core of an IC, processed in a 65 nm technology with 1.8 nm gate oxide after MM testing, although a…”
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ESD protection for thin gate oxides in 65nm by Notermans, Guido, Smedes, Theo, Mrčarica, Željko, Jong, Peter de, Stephan, Ralph, Zwol, Hans van, Maksimovic, Dejan

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Electronic circuit simulation in a mixed-language environment by Litovski, Vančo, Dimić, Željko, Damnjanović, Milunka, Mrčarica, Željko

“…Simulation of complex systems, that include analogue and digital circuitry and even non-electrical devices, may be simplified if libraries developed in…”
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Ideal switch model cuts simulation time by Litovski, V., Savic, M., Mrcarica, Z.

“…Considering the fact that any circuit containing an ideal switch is nonlinear, we developed a model for the ideal switch that is applicable in a…”
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Simulation of non-linear magnetic circuits modelled using artificial neural network by Litovski, Vančo B., Mrčarica, Željko, Ilić, Tihomir

“…Simulation of electromechanical systems and other systems where coupling of different physical effects is modelled, is currently a very active research area…”
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Mixed-signal modeling with AleC++: Specific features of the HDL by Litovski, Vančo, Maksimović, Dejan, Mrčarica, Željko

“…Alecsis behavioral simulator and its mixed-signal hardware description language (HDL) AleC++ form an open simulation environment, where electronic circuits and…”
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ESD protection for high-voltage CMOS technologies by Quittard, O., Mrcarica, Z., Blanc, F., Notermans, G., Smedes, T., van Zwol, H.

“…Two types of ESD protection for high-voltage CMOS technologies are presented. Both solutions can be readily ported between different HV CMOS process options…”
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Designing HV active clamps for HBM robustness by Notermans, G., Quittard, O., Heringa, A., Mrcarica, Z., Blanc, F., van Zwol, H., Smedes, T., Keller, T., de Jong, P.

“…Electrical measurements, physical damage analysis, and device simulation have proved that the drain junction breakdown voltage is the determining failure…”
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