Search Results - "Moreno, R.L."
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1
An Ultra-Low-Voltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing
Published in IEEE transactions on circuits and systems. II, Express briefs (01-10-2007)“…An ultra-low-voltage ultra-low-power CMOS Miller operational transconductance amplifier (OTA) with rail-to-rail input/output swing is presented. The topology…”
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2
Embolización de arterias uterinas como tratamiento de la hemorragia obstétrica
Published in Clínica e investigación en ginecología y obstetricia (01-01-2016)“…Resumen Objetivo Describir los casos de hemorragia obstétrica que han precisado embolización de arterias uterinas (EAU), evaluando la eficacia de dicha técnica…”
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3
A murine model for the study of immune memory in response to pneumococcal conjugate vaccination
Published in Vaccine (13-08-2004)“…We developed a murine model for assessment of immunological memory and antibody-induced protection to nasopharyngeal (NP) challenges. BALB/c female mice ( n=10…”
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4
An auto-zero sample-and-hold circuit in 0.8 μm CMOS
Published in ASIC, 2003. Proceedings. 5th International Conference on (2003)“…This work describes the silicon implementation of a new sample-and-hold circuit topology. The main feature of the circuit is its auto-zero capability. The…”
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Conference Proceeding -
5
Design of a measurement and interface integrated circuit for characterization of switched current memory cells
Published in Proceedings Eleventh International Conference on VLSI Design (1998)“…Dynamic current mirrors, or SI current cells, are widely used in analog signal processing circuits. They could be implemented using a standard cell methodology…”
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6
Design Considerations of Class D Amplifier Suitable Hearing Aid Devices
Published in Electronics, Robotics and Automotive Mechanics Conference (CERMA 2007) (01-09-2007)“…This paper describes the design of a class D amplifier for hearing aid devices using PWM modulation technique. The new topology used to overcome offset…”
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Conference Proceeding -
7
A 1.6GHz Downconverter Mixer in 0.25μm CMOS
Published in APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems (01-12-2006)“…This work shows the implementation of a CMOS double balanced mixer based in the Gilbert cell capable of providing high conversion gain and high linearity. The…”
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8
A 0.25μm CMOS Downconverter Mixer for 1.6GHz
Published in TENCON 2006 - 2006 IEEE Region 10 Conference (01-11-2006)“…This work shows the implementation of a CMOS double balanced mixer based in the Gilbert cell capable of providing high conversion gain and high linearity. The…”
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9
The design of a digital IC for thyristor triggering
Published in Proceedings Tenth International Conference on VLSI Design (1997)“…This paper presents the functional description and the design of a fully digital integrated circuit for thyristor firing control in a 1 /spl mu/m CMOS…”
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10
A CMOS low noise amplifier for biomedical telemetry applications
Published in Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS 2003 (2003)“…This paper describes a 200 MHz inductorless low-noise amplifier (LNA) fabricated in a standard digital 0.35-/spl mu/m AMS CMOS process. The LNA has been…”
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11
A bandgap voltage reference using digital CMOS process
Published in 1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196) (1998)“…This work describes some issues and criteria for the design of a bandgap voltage reference. It examines a particular voltage reference architecture,…”
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12
A precise sample-and-hold circuit topology in CMOS for low voltage applications with offset voltage self correction
Published in 9th International Conference on Electronics, Circuits and Systems (2002)“…This work describes a new topology for CMOS sample-and-hold circuits in low voltage with self-correction of the offset voltage caused by mismatches in the…”
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13
An offset self-correction sample and hold circuit for precise applications in low voltage CMOS
Published in Asia-Pacific Conference on Circuits and Systems (2002)“…This work describes a new topology for CMOS sample-and-hold circuits, in low voltage, with self-correction of the offset voltage caused by mismatches in the…”
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14
An offset self-correction sample and hold circuit for precise applications in low voltage CMOS
Published in Proceedings. 15th Symposium on Integrated Circuits and Systems Design (2002)“…This work describes a new topology for CMOS sample-and-hold circuits, in low voltage, with self-correction of the offset voltage caused by mismatches in the…”
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15
A precise sample-and-hold circuit topology in CMOS for low voltage applications with offset voltage self correction
Published in IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions (2002)“…This work describes a new topology for CMOS sample-and-hold circuits in low voltage with self-correction of the offset voltage caused by mismatches in the…”
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Conference Proceeding