Search Results - "Morad, Ronny"
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Cost-effective analysis of post-silicon functional coverage events
Published in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 (01-03-2017)“…Post-silicon validation is a major challenge due to the combined effects of debug complexity and observability constraints. Assertions as well as a wide…”
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Conference Proceeding -
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Accelerators and emulators: can they become the platform of choice for hardware verification?
Published in Proceedings of the Conference on Design, Automation and Test in Europe (12-03-2012)“…The verification of modern hardware designs requires an enormous amount of simulation resources. A growing trend in the industry is the use of accelerators and…”
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Conference Proceeding
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3
Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification
Published in 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC) (05-06-2016)“…Post-silicon validation has become essential in catching hard-to-detect, rarely-occurring bugs that have slipped through pre-silicon verification. Post-silicon…”
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Conference Proceeding -
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ArChiVED: Architectural checking via event digests for high performance validation
Published in 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01-03-2014)“…Simulation-based techniques play a key role in validating the functional correctness of microprocessor designs. A common approach for validating…”
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Conference Proceeding -
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Panel: Future SoC verification methodology: UVM evolution or revolution?
Published in 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01-03-2014)“…With increasing design complexity System on Chip (SoC) verification is becoming a more and more important and challenging aspect of the overall development…”
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Conference Proceeding -
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Accelerators and emulators: Can they become the platform of choice for hardware verification?
Published in 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01-03-2012)“…The verification of modern hardware designs requires an enormous amount of simulation resources. A growing trend in the industry is the use of accelerators and…”
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Conference Proceeding -
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Checking architectural outputs instruction-by-instruction on acceleration platforms
Published in DAC Design Automation Conference 2012 (03-06-2012)“…Simulation-based verification is an integral part of a modern microprocessor's design effort. Commonly, several checking techniques are deployed alongside the…”
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Conference Proceeding -
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Approximating checkers for simulation acceleration
Published in Proceedings of the Conference on Design, Automation and Test in Europe (12-03-2012)“…Simulation-based functional verification is the key validation methodology the industry. The performance of logic simulators, however, is not sufficient to…”
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Conference Proceeding -
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Approximating checkers for simulation acceleration
Published in 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01-03-2012)“…Simulation-based functional verification is the key validation methodology the industry. The performance of logic simulators, however, is not sufficient to…”
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Conference Proceeding -
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Facing the challenge of new design features: an effective verification approach
Published in 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC) (05-06-2011)“…Verifying new hardware systems is a daunting task. To reduce the amount of effort involved, verification teams attempt to reuse as much verification IP as…”
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Conference Proceeding -
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IBM system z functional and performance verification using X-Gen
Published in 2008 IEEE International High Level Design Validation and Test Workshop (01-11-2008)“…In the IBM System z10trade project, new hardware components such as a processor core, memory and IO subsystem as well as new packaging components have been…”
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Conference Proceeding -
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ISA-independent post-silicon validation for the address translation mechanisms of modern microprocessors
Published in 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS) (01-07-2016)“…Post-silicon validation complements traditional simulation-based pre-silicon verification and offers very high throughput since validation programs run at the…”
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Conference Proceeding -
13
Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation
Published in 2016 IEEE 34th International Conference on Computer Design (ICCD) (01-10-2016)“…Post-silicon validation is one of the most important parts of the microprocessor prototype chip lifecycle. It is the last chance for debug engineers to detect…”
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Conference Proceeding -
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Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms
Published in 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (01-11-2013)“…Software-based simulation provides a convenient environment for microprocessor design validation, where a number of complex software checkers are integrated…”
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Conference Proceeding -
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An Agile Post-Silicon Validation Methodology for the Address Translation Mechanisms of Modern Microprocessors
Published in IEEE transactions on device and materials reliability (01-03-2017)“…Detection of bugs in the complex address translation mechanisms (ATMs) of modern microprocessors is much harder than in other microprocessor structures because…”
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Magazine Article -
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Post-Silicon Validation in the SoC Era: A Tutorial Introduction
Published in IEEE design and test (01-06-2017)“…Editor's note: Post-silicon validation is a complex and critical component of a modern system-on-chip (SoC) design verification. It includes a large number of…”
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Magazine Article