Search Results - "Monsieur, F."

28nm FDSOI technology platform for high-speed low-voltage digital applications by Planes, N., Weber, O., Barral, V., Haendler, S., Noblet, D., Croain, D., Bocat, M., Sassoulas, P., Federspiel, X., Cros, A., Bajolet, A., Richard, E., Dumont, B., Perreau, P., Petit, D., Golanski, D., Fenouillet-Beranger, C., Guillot, N., Rafik, M., Huard, V., Puget, S., Montagner, X., Jaud, M., Rozeau, O., Saxod, O., Wacquant, F., Monsieur, F., Barge, D., Pinzelli, L., Mellier, M., Boeuf, F., Arnaud, F., Haond, M.

“…For the first time, a full platform using FDSOI technology is presented. This work demonstrates 32% and 84% speed boost at 1.0V and 0.6V respectively, without…”
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Analysis and Modeling of the Charge Collection Mechanism in 28-nm FD-SOI by Correas, V., Nofal, I., Cerba, J., Monsieur, F., Gasiot, G., Alexandrescu, D., Roche, P., Gonella, R.

“…TCAD simulations on 28-nm fully depleted silicon on insulator structures are used to analyze the charge collection mechanism leading to parasitic current when…”
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Simulation of the thermal stress induced by CW 1340 nm laser on 28 nm advanced technologies by Penzes, M., Dudit, S., Monsieur, F., Silvestri, L., Nallet, F., Lewis, D., Perdu, P.

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Insight Into HCI Reliability on I/O Nitrided Devices by Doyen, C., Yon, V., Garros, X., Basset, L., Frutuoso, T. Mota, Dagon, C., Diouf, C., Federspiel, X., Millon, V., Monsieur, F., Pribat, C., Roy, D.

“…Hot carriers injection (HCI) degradation plays an important role in advanced technologies. We carried out an extensive analysis of this degradation mode on…”
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Implant heating contribution to amorphous layer formation: a KMC approach by Julliard, P.L., Dumas, P., Monsieur, F., Hilario, F., Rideau, D., Hemeryck, A., Cristiano, F.

“…The present work investigates the influence of implantation induced heating on the amorphization profile in silicon wafer. A simulation approach based on a…”
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14nm FDSOI technology for high speed and energy efficient applications by Weber, O., Josse, E., Andrieu, F., Cros, A., Richard, E., Perreau, P., Baylac, E., Degors, N., Gallon, C., Perrin, E., Chhun, S., Petitprez, E., Delmedico, S., Simon, J., Druais, G., Lasserre, S., Mazurier, J., Guillot, N., Bernard, E., Bianchini, R., Parmigiani, L., Gerard, X., Pribat, C., Gourhant, O., Abbate, F., Gaumer, C., Beugin, V., Gouraud, P., Maury, P., Lagrasta, S., Barge, D., Loubet, N., Beneyton, R., Benoit, D., Zoll, S., Chapon, J.-D., Babaud, L., Bidaud, M., Gregoire, M., Monget, C., Le-Gratiet, B., Brun, P., Mellier, M., Pofelski, A., Clement, L.R., Bingert, R., Puget, S., Kruck, J.-F., Hoguet, D., Scheer, P., Poiroux, T., Manceau, J.-P., Rafik, M., Rideau, D., Jaud, M.-A., Lacord, J., Monsieur, F., Grenouillet, L., Vinet, M., Liu, Q., Doris, B., Celik, M., Fetterolf, S.P., Faynot, O., Haond, M.

“…This paper presents a 14nm technology designed for high speed and energy efficient applications using strain-engineered FDSOI transistors. Compared to the 28nm…”
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Strain engineered extremely thin SOI (ETSOI) for high-performance CMOS by Khakifirooz, A., Cheng, K., Nagumo, T., Loubet, N., Adam, T., Reznicek, A., Kuss, J., Shahrjerdi, D., Sreenivasan, R., Ponoth, S., He, H., Kulkarni, P., Liu, Q., Hashemi, P., Khare, P., Luning, S., Mehta, S., Gimbert, J., Zhu, Y., Zhu, Z., Li, J., Madan, A., Levin, T., Monsieur, F., Yamamoto, T., Naczas, S., Schmitz, S., Holmes, S., Aulnette, C., Daval, N., Schwarzenbach, W., Nguyen, B.-Y, Paruchuri, V., Khare, M., Shahidi, G., Doris, B.

“…High-performance strain-engineered ETSOI devices are reported. Three methods to boost the performance, namely contact strain, strained SOI (SSDOI) for NFET,…”
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Hot Carrier Stress modeling: From degradation kinetics to trap distribution evolution by Torrente, G., Federspiel, X., Rideau, D., Monsieur, F., Tavernier, C., Coignus, J., Roy, D., Ghibaudo, G.

“…A complete TCAD model addressing Hot Carrier Degradation for Flash technology is presented. After having underlined the need for a power law with a low…”
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HCI degradation model based on the diffusion equation including the MVHR model by Lachenal, D., Monsieur, F., Rey-Tauriac, Y., Bravaix, A.

“…This paper presents an improvement of the R-D model explaining analytically the 0.5 exponent observed during HCI stress. An original model based on diffusion…”
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TCAD modeling challenges for 14nm FullyDepleted SOI technology performance assessment by Tavernier, C., Pereira, F. G., Nier, O., Rideau, D., Monsieur, F., Torrente, G., Haond, M., Jaouen, H., Noblanc, O., Niquet, Y. M., Jaud, M.-A, Triozon, F., Casse, M., Lacord, J., Barbe, J. C.

“…This paper reviews the main challenges for the TCAD of 14nm Fully-Depleted Silicon-On-Insulator (FDSOI) technology performance assessment. Thanks to a…”
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New compact model for performance and process variability assessment in 14nm FDSOI CMOS technology by Denis, Y., Monsieur, F., Ghibaudo, G., Mazurier, J., Josse, E., Rideau, D., Charbuillet, C., Tavernier, C., Jaouen, H.

“…This paper provides a compact model for performance and process variability assessment in 14nm FDSOI CMOS technology. It is used to investigate MOS performance…”
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Wear-out, breakdown occurrence and failure detection in 18–25 Å ultrathin oxides by Monsieur, F., Vincent, E., Pananakakis, G., Ghibaudo, G.

“…In this paper, a comprehensive description of the ultrathin oxide failure evolution is presented. For sub-25 Å, Hard BD is no longer hard. A complete…”
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Multi-scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility by Nier, O., Rideau, D., Niquet, Y. M., Monsieur, F., Nguyen, V. H., Triozon, F., Cros, A., Clerc, R., Barbé, J. C., Palestri, P., Esseni, D., Duchemin, I., Smith, L., Silvestri, L., Nallet, F., Tavernier, C., Jaouen, H., Selmi, L.

“…Mobility in high-k/metal-gate Ultra-Thin Body and Box Fully Depleted SOI devices has been extensively investigated by means of multi-scale simulations and…”
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Modified space-charge limited conduction in tantalum pentoxide MIM capacitors by Martinez, V., Besset, C., Monsieur, F., Montès, L., Ghibaudo, G.

“…Conduction mechanisms in tantalum pentoxide MIM capacitors are studied using four dielectric thicknesses from 200 to 900 Å in the 223-323K (−50 °C/+50 °C)…”
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Impact of inside spacer process on fully self-aligned 250 GHz SiGe:C HBTs reliability performances: a-Si vs. nitride by Diop, M., Revil, N., Marin, M., Monsieur, F., Chevalier, P., Ghibaudo, G.

“…A critical process aspect of the bipolar device is the oxide isolation between the emitter and the extrinsic base. Indeed, it is a well known fact that the…”
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Degradation mechanism understanding of NLDEMOS SOI in RF applications by Lachenal, D., Bravaix, A., Monsieur, F., Rey-Tauriac, Y.

“…The distinct channel hot-carrier (CHC) degradation mechanisms have been observed in NLDEMOS processed from a SOI CMOS technology. The charge-pumping (CP)…”
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A thorough investigation of progressive breakdown in ultra-thin oxides. Physical understanding and application for industrial reliability assessment by Monsieur, F., Vincent, E., Roy, D., Bruyere, S., Vildeuil, J.C., Pananakakis, G., Ghibaudo, G.

“…This paper provides a close investigation of the gate oxide failure for thickness below 24/spl Aring/. At first, the failure detection is discussed showing…”
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Impact of substrate bias on GIDL for thin-BOX ETSOI devices by Kulkarni, P., Liu, Q., Khakifirooz, A., Zhang, Y., Cheng, K., Monsieur, F., Oldiges, P.

“…We present a detailed analysis of substrate bias (V bb ) impact on gate induced drain leakage (GIDL) for thin-BOX extremely thin silicon-on-insulator (ETSOI)…”
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Invariant integral and the transition to steady states in separable dynamical systems by Lippi, GL, Barland, S, Monsieur, F

“…We show that the transition between fixed points in a separable dynamical system is fully described by an invariant integral. We discuss in detail the case of…”
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High-K gate stack breakdown statistics modeled by correlated interfacial layer and high-k breakdown path by Ribes, G, Mora, P, Monsieur, F, Rafik, M, Guarin, F, Yang, G, Roy, D, Chang, W L, Stathis, J

“…We show that a model in which the breakdown of the interfacial layer induces a correlated breakdown in the high-K, at the same location, provides a good model…”
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