Search Results - "Mok, InSu"
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Chip Stackable, Ultra-thin, High-Flexibility 3D FOWLP (3D SWIFT® Technology) for Hetero-Integrated Advanced 3D WL-SiP
Published in 2018 IEEE 68th Electronic Components and Technology Conference (ECTC) (01-05-2018)“…Fan-out wafer level packaging (FOWLP) is one of the latest technologies to meet the requirements of high performance and thin form-factor, especially for…”
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Conference Proceeding -
2
Wafer Level Void-Free Molded Underfill for High-Density Fan-out Packages
Published in 2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC) (02-12-2020)“…In this study, experiments and mold flow simulation results are presented for a void-free wafer level molded underfill (WLMUF) process with High-Density…”
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Conference Proceeding