Search Results - "Militaru, L."
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Multilayer Structure in SeAsGeSi-based OTS for High Thermal Stability and Reliability Enhancement
Published in ESSDERC 2022 - IEEE 52nd European Solid-State Device Research Conference (ESSDERC) (19-09-2022)“…In this paper, we present an innovative Multilayer SeAsGeSi-based Ovonic Threshold Switching (OTS) Selector targeting high reliability for Crossbar arrays. We…”
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Conference Proceeding -
2
Traps centers impact on Silicon nanocrystal memories given by Random Telegraph Signal and low frequency noise
Published in Solid-state electronics (01-02-2011)“…► RTS analysis allows the determination of single trap energy level and localization. ► For 0.8nm gate oxide thick, transport is governed by nc-Si and…”
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3
Study of a single dangling bond at the SiO2/Si interface in deep submicron metal–oxide–semiconductor transistors
Published in Applied physics letters (22-09-2003)“…Two-level charge pumping (CP) measurements have been used for the study of a single trap situated at the SiO2/Si interface of sub-100 nm…”
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4
Interpretation of scanning capacitance microscopy for thin oxides characterization
Published in Thin solid films (30-10-2009)“…In this paper, the reliability of the characterization of thin oxides at the nanoscale using Scanning Capacitance Spectroscopy (SCS) is addressed. 5 nm thick…”
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5
Influence of the surrounding ambient on the reliability of the electrical characterization of thin oxide layers using an atomic force microscope
Published in Microelectronics and reliability (01-12-2011)“…Physical and electrical properties of thin oxide films have been studied using the atomic force microscope (AFM). Experiments have been done in three different…”
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6
Study of SiO2/Si interface properties of SON MOSFETs by random telegraph signal and charge pumping measurements
Published in Solid-state electronics (2008)Get full text
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7
Perturbative phenomena affecting the quality of local measurements of electrical quantities at nanoscale
Published in 29th Conference on Precision Electromagnetic Measurements (CPEM 2014) (01-08-2014)“…This contribution aims at making an inventory of the sources of errors which impinge current and capacitance measurements operated with an atomic force…”
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Conference Proceeding Journal Article -
8
Characterization of ultra-thin SiO2 by capacitance-voltage and charge pumping measurements
Published in Microelectronic engineering (01-07-2005)“…In this paper, we present results on electrical measurements of ultra thin SiO2 layers (from 3.5 nm down to 1.7 nm), used as gate dielectric in…”
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9
Three level charge pumping on a single interface trap
Published in IEEE electron device letters (01-02-2002)“…We present results obtained by performing two and three level charge pumping (CP) technique on a single trap present at the SiO/sub 2//Si interface of…”
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10
Parameters extraction of hafnium based gate oxide capacitors
Published in Microelectronics and reliability (01-04-2007)“…From quantum simulations of both capacitance and current measurements, the main physical parameters (dielectric thickness and permittivity, doping levels) of…”
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Journal Article Conference Proceeding -
11
Study of trap centres in silicon nanocrystal memories
Published in Materials science & engineering. B, Solid-state materials for advanced technology (15-09-2003)“…This work reports on a comprehensive study of trapping centres in Si nanocrystal based memories. Silicon nanotrap memories have been studied using static,…”
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12
Multilayer OTS Selectors Engineering for High Temperature Stability, Scalability and High Endurance
Published in 2021 IEEE International Memory Workshop (IMW) (01-05-2021)“…We present the engineering of Ovonic Threshold Switching (OTS) Multilayer (ML) Selector device based on the stacking of N-doped SbSe and Ge layers. By tuning…”
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Conference Proceeding -
13
Innovative Multilayer OTS Selectors for Performance Tuning and Improved Reliability
Published in 2020 IEEE International Memory Workshop (IMW) (01-05-2020)“…In this paper, we investigate an innovative Ovonic Threshold Switching Selector (OTS) based on Multilayer structure (ML). Thanks to physico-chemical analysis…”
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Conference Proceeding -
14
Time domain and frequency analysis of RTS noise in deep submicron SiGe HBTs
Published in Nuclear instruments & methods in physics research. Section B, Beam interactions with materials and atoms (2002)“…Our work is focused on the identification of defects responsible for the current fluctuations at the origin of low-frequency noise or random telegraphic…”
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15
Electrical characterization of SrTiO3 thin films deposited on Si(001) substrate by liquid injection MOCVD
Published in Microelectronic engineering (01-04-2004)“…The electrical properties of SrTiO3 thin films grown on Si substrates by liquid injection MOCVD have been investigated as a function of films thickness (from 4…”
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Conference Proceeding Journal Article -
16
RTS noise in submicron SiGe epitaxial base bipolar transistors
Published in Microelectronics and reliability (01-08-2000)“…In this paper, we report a comprehensive study of Random Telegraph Signal (RTS) noise in SiGe epitaxial base bipolar transistors. We analyse the multilevel…”
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17
Coulomb-blockade in nanometric Si-film silicon-on-nothing (SON) MOSFETs
Published in IEEE transactions on nanotechnology (01-12-2003)“…The advantages of using architectures with gate nonoverlapped with source/drain have already been demonstrated in order to measure controlled single electron…”
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Journal Article Conference Proceeding -
18
Investigation of deep traps in silicon–germanium epitaxial base bipolar transistors with a single polysilicon quasi self-aligned architecture
Published in Microelectronics and reliability (2001)“…The electrical properties of Si/Si 1− x Ge x bipolar transistors have been analysed at temperatures ranging from 77 to 500 K. The investigated SiGe base…”
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19
Indium oxide nanoparticles for resistive RAM integration using a compatible industrial technology
Published in Solid-state electronics (01-02-2021)“…•Uniform layer deposition by MOCVD on 12″ wafers of high density sub-10 nm indium oxide nanoparticles.•Compatible CMOS BEOL process for vertical resistive…”
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20
Traps identification in silicon nanocrystals memories by low noise technique
Published in Materials Science & Engineering C (01-07-2008)“…This work reports the extraction of oxide traps properties of n-metal–oxide–semiconductor field-effect transistors with W × L = 0.5 × 0.1 μm 2 using random…”
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