Search Results - "Mergens, Markus"

ESD protection solutions for high voltage technologies by Keppens, Bart, Mergens, Markus P.J., Trinh, Cong Son, Russ, Christian C., Van Camp, Benjamin, Verhaege, Koen G.

“…There is a trend to revive mature technologies while including high voltage options. ESD protection in those technologies is challenging due to narrow ESD…”
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Automotive High-Speed Interfaces: Future Challenges for System-level HV-ESD Protection and First- Time-Right Design by Bub, Sergej, Mergens, Markus, Hardock, Andreas, Holland, Steffen, Hilbrink, Ayk

“…This paper describes future design challenges of discrete system-level ESD protection (high-voltage, low-capacitance) of automotive high-speed data links such…”
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Analysis of ESD Behavior of Stacked nMOSFET RF Switches in Bulk Technology by Rigato, Matteo, Fleury, Clement, Schwarz, Benedikt, Mergens, Markus, Bychikhin, Sergey, Simburger, Werner, Pogany, Dionyz

“…The operation of stacked MOSFET circuit for RF switch application under electrostatic discharge (ESD) conditions is studied by transmission line pulse (TLP)…”
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High holding current SCRs (HHI-SCR) for ESD protection and latch-up immune IC operation by Mergens, Markus P.J., Russ, Christian C., Verhaege, Koen G., Armer, John, Jozwiak, Phillip C., Mohn, Russ

“…This paper presents a novel Silicon Controlled Rectifier (SCR) for power line and local I/O ESD protection. The High holding current SCRs (HHI-SCR) exhibits a…”
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ESD-level circuit simulation impact of interconnect RC-delay on HBM and CDM behavior by Mergens, Markus P.J, Wilkening, Wolfgang, Kiesewetter, Gerhard, Mettler, Stephan, Wolf, Heinrich, Hieber, Jürgen, Fichtner, Wolfgang

“…An extraction method for the distributed, parasitic RC-elements of MOS single- and multi-fingers is introduced by deducing a rule of thumb for an effective…”
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On-Chip ESD by Mergens, Markus P.J.

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Analysis of lateral DMOS power devices under ESD stress conditions by Mergens, M.P.J., Wilkening, W., Mettler, S., Wolf, H., Stricker, A., Fichtner, W.

“…The physical mechanisms specific for 40 V LDMOS power transistors under ESD stress (gate grounded/coupled) are investigated in detail by transmission line…”
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PII: S0026-2714(01)00029-4 by Mergens, Markus P.J

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ESD protection considerations in high voltage technologies by Mergens, Markus

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Advanced SCR ESD protection circuits for CMOS/SOI nanotechnologies by Mergens, M.P.J., Marichal, O., Thijs, S., Van Camp, B., Russ, C.C.

“…This paper reviews the application of SCR-based ESD protection circuits in advanced CMOS/SOI technologies. The devices are integrated in a flexible modular…”
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Modular approach of a high current MOS compact model for circuit-level ESD simulation including transient gate-coupling behaviour by Mergens, Markus, Wilkening, Wolfgang, Mettler, Stephan, Wolf, Heinrich, Fichtner, Wolfgang

“…A novel modular strategy for highly flexible modeling of ESD-capable MOS compact models is introduced. This high current MOS model comprises the important…”
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Novel design of driver and ESD transistors with significantly reduced silicon area by Verhaege, Koen G, Mergens, Markus, Russ, Christian, Armer, John, Jozwiak, Phillip

“…This paper presents three novel design techniques, which combined fulfill all major requirements posed on large driver and electrostatic discharge (ESD)…”
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ESD protection circuit design for ultra-sensitive IO applications in advanced sub-90nm CMOS technologies by Mergens, M., Wybo, G., Van Camp, B., Keppens, B., De Ranter, F., Verhaege, K., Jozwiak, P., Armer, J., Russ, C.

“…This paper presents a protection strategy for ultra-sensitive I/O containing thin gate oxides, while combining two complementary ESD design approaches: (1)…”
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Characterization and optimization of a bipolar ESD-device by measurements and simulations by Stricker, Andreas D., Mettler, Stephan, Wolf, Heinrich, Mergens, Markus, Wilkening, Wolfgang, Gieser, Horst, Fichtner, Wolfgang

“…The design of ESD (electro-static discharge) protection structures can be significantly shortened by using thermo-electrical device simulations. In many cases…”
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ESD protection considerations in advanced high-voltage technologies for automotive by Mergens, M.P.J., Mayerhofer, M.T., Willemen, J.A., Stecher, M.

“…This paper discusses challenges and solutions of automotive ESD protection design in a reliability driven industry. Various ESD/EMI specifications are…”
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ESD protection solutions for high voltage technologies by Keppens, B., Mergens, M.P.J., Cong Son Trinh, Russ, C.C., Van Camp, B., Verhaege, K.G.

“…There is a trend to revive mature technologies while including high voltage options. ESD protection in those technologies is challenging due to narrow ESD…”
Get full text

High Holding Current SCRs (HHI-SCR) for ESD protection and latch-up immune IC operation by Mergens, Markus P.J., Russ, Christian C., Verhaege, Koen G., Armer, John, Jozwiak, Phillip C., Mohn, Russ

“…This paper presents a novel SCR for power line and local I/O ESD protection. The HHI-SCR exhibits a dual ESD clamp characteristic: low-current high-voltage…”
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Modular approach of a high current MOS compact model for circuit-level ESD simulation including transient gate coupling behavior by Mergens, M., Wilkening, W., Mettler, S., Wolf, H., Fichtner, W.

“…A novel modular strategy for highly flexible modeling of ESD-capable MOS compact models is introduced. These high current MOS models comprise the important…”
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Active-source-pump (ASP) technique for ESD design window expansion and ultra-thin gate oxide protection in sub-90nm technologies by Mergens, M., Armer, J., Jozwiak, P., Keppens, B., De Ranter, F., Verhaege, K., Kumar, R.

“…This paper presents a novel active-source-pump (ASP) circuit technique to significantly lower the ESD sensitivity of ultrathin gate inputs in advanced sub-90nm…”
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