A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source Applications

This work presents a multi-channel, time-to-digital converter (TDC) based on a field-programmable gate array (FPGA). A thorough characterization of the TDC, based on a Xilinx Virtex-6 FPGA, is presented and several performance parameters are described, including distortions due to the FPGA architect...

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Bibliographic Details
Published in:	IEEE transactions on nuclear science Vol. 60; no. 3; pp. 2203 - 2208
Main Authors:	Fishburn, M. W., Menninga, L. H., Favi, C., Charbon, E.
Format:	Journal Article
Language:	English
Published:	IEEE 01-06-2013
Subjects:	Clocks Delay lines Field programmable gate arrays Field-programmable gate array (FPGA)-based time-to-digital converter (TDC) Jitter multi-channel time-to-digital converter (TDCs) Positron emission tomography positron emission tomography (PET) Temperature measurement
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Summary:	This work presents a multi-channel, time-to-digital converter (TDC) based on a field-programmable gate array (FPGA). A thorough characterization of the TDC, based on a Xilinx Virtex-6 FPGA, is presented and several performance parameters are described, including distortions due to the FPGA architecture, temperature effects, intra-chip position variation, and chip-to-chip variation. An optimized TDC exhibits 10 ps LSB duration, an integral non-linearity range of 3.86 LSB, and an input range longer than 100 μs. Total time uncertainty (single-shot jitter) is measured to be 19.6 ps at a time difference of 40 ns, and less than 400 ps at a time difference larger than 100 μs.
ISSN:	0018-9499 1558-1578
DOI:	10.1109/TNS.2013.2241789