Search Results - "Meng-Ta Yang"

Pericapsular Nervous Group Block versus Suprainguinal Fascia Iliaca Block Using the Same Injection Volume in Primary HIP Arthroplasty Prospective Observational Study by Álvarez, Luis Baeza, González, José Manuel López, Miramontes, Gustavo Illodo, Gómez, Bárbara María Jiménez, Colon, María Vega, Aguirre, Alejandra Williams, Reza, Pablo Casas, Álvarez, Servando López, Liao, Shu-Wei, Ho, Bing-Ying, Yang, Meng-Ta, Hou, Jin-De, Liu, Chih-Chung, Wu, I-Chi, Lin, Jui-An, Galluccio, Felice

“…Objectives. To determine the pericapsular nerve group (PENG) block’s postoperative analgesic efficacy and safety compared to the suprainguinal fascia iliaca…”
Get full text

Novel mechanism of B cell‐mediated anaphylaxis after spinal anesthesia with bupivacaine by Yang, Meng‐Ta, Hwa, Su‐Yang, Liu, Feng‐Cheng, Lin, Tso‐Chou

“…Dear Editor, The estimated incidence of perioperative grade 3–5 anaphylaxis is 1 per 10,000 patients administered anesthesia, with the leading causes being…”
Get full text

Labor pain-induced chordae tendineae rupture by Yang, Meng-Ta, Yu, Mu-Hsien, Yeh, Chun-Chang, Tseng, Wei-Cheng

Get full text

Is analgesia nociception index monitor suitable for post-heart transplant patients under general anesthesia? by Shih-Yu Chen, Zhi-Fu Wu, Meng-Ta Yang, Hou-Chuan Lai, Nan-Kai Hung

Get full text

RTL-based Clock Recovery Architecture with All-Digital Duty-Cycle Correction by Wang, Ping -Ying, Yang, Meng-Ta, Chen, Shang-Ping, Lin, Meng-Hsueh, Yang, Jing-Bing

“…RTL-based clock-recovery (CR) loop offers jitter filtering and frequency multiplication with a data-rate range from 76 to 496Mb/s. The design has direct…”
Get full text

DLL-based clock recovery in a PRML channel by Ping Ying Wang, Hsueh-Wu Kao, Yung-Yu Lin, Meng-Ta Yang, Jin-Bin Yang, Hsiang Ji Hsieh, Yuh Cheng, Chih-Yuan Chen, Jyh-Shin Pan

“…A DLL-based clock recovery circuit is designed to eliminate drawbacks of the VCO while maintaining the advantages of a PLL for frequency multiplication and…”
Get full text

A phase locked loop with a mixed mode loop filter for clock/data recovery in optical disc drives by Ping-Ying Wang, Hsiang Ji Hsieh, Yung-Yu Lin, Meng-Ta Yang, Hsueh-Wu Kao

“…A PLL with a mixed mode loop filter is designed to suppress the need for a large size capacitor in an analog clock/data recovery circuit and eliminates the…”
Get full text

A CMOS multi-format read/write SoC for 7/spl times/Blu-ray/16/spl times/DVD/56/spl times/CD by Jyh-Shin Pan, Pi-Hai Liu, Yuh Cheng, Wen-Yi Wu, Chih-Yuan Chen, Jin-Bin Yang, Meng-Ta Yang, Hsiang-Ji Hsieh, Ping-Ying Wang, Ming-Yang Chao, Li-Lien Lin, Jia-Horng Shieh, Chun-Nan Chen, Hsueh-Wu Kao, Yung-Yu Lin, Ching-Ning Chiu, Hsin-Cheng Chen, Shao-Chueh Hu, Shu-Fang Tsai, Chi-Chun Hsu, Cheng-Chih Mao, Chih-Chin Chen

“…An SoC for high-speed read and write functions is designed for multi-formats of 7/spl times/BD/16/spl times/DVD/56/spl times/CD at channel bit rates of…”
Get full text