Search Results - "Meijer, Maurice"

BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning Acceleration by Shi, Man, Jain, Vikram, Joseph, Antony, Meijer, Maurice, Verhelst, Marian

“…Bit-serial computation facilitates bit-wise sequential data processing, offering numerous benefits, such as a reduced area footprint and dynamically-adaptive…”
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Power Challenges Caused by IOT Edge Nodes: Securing and Sensing Our World by Spehar, James, Fuks, Adam, Vauclair, Marc, Meijer, Maurice, van Beek, Joost, Shao, Bin

“…This paper discusses power challenges caused by an explosion in data driven application at the Edge of IOT. How technology, power management techniques,…”
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Digital Systems Power Management for High Performance Mixed Signal Platforms by Kapoor, Ajay, Groot, Cas, Pique, Gerard Villar, Fatemi, Hamed, Echeverri, Juan, Sevat, Leo, Vertregt, Maarten, Meijer, Maurice, Sharma, Vibhu, Yu Pu, de Gyvez, Jose Pineda

“…High performance mixed signal (HPMS) platforms require stringent overall system and subsystem performance. The ability to design ultra-low power systems is…”
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Body-Bias-Driven Design Strategy for Area- and Performance-Efficient CMOS Circuits by Meijer, M., de Gyvez, J. P.

“…Worst-case design uses extreme process corner conditions which rarely occur. This limits maximum speed specifications and costs additional power due to area…”
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Logic synthesis of low-power ICs with ultra-wide voltage and frequency scaling by Pu, Yu, Echeverri, Juan, Meijer, Maurice, de Gyvez, Jose Pineda

“…For low-power digital ICs with ultra-wide voltage and frequency scaling (e.g., from the nominal supply voltage to the sub/near-threshold regime), achieving…”
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Analysis of the Influence of Substrate on the Performance of On-Chip MOS Decoupling Capacitors by Rius, J., Meijer, M.

“…The interaction between substrate and devices is normally neglected during the design of on-chip MOS decoupling capacitors (decaps). However, it may…”
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A 350nA voltage regulator for 90nm CMOS digital circuits with Reverse-Body-Bias by Pique, G. V., Meijer, M.

“…An ultra-low power CMOS 90nm Reverse-Body-Bias generator is proposed to reduce digital circuit leakage. A Switched-Capacitor-Converter (SCC) and a Low-Drop-Out…”
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CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories by Shi, Man, Colleman, Steven, VanDeMieroop, Charlotte, Joseph, Antony, Meijer, Maurice, Dehaene, Wim, Verhelst, Marian

“…2023 24th International Symposium on Quality Electronic Design (ISQED) Deep neural networks (DNN) use a wide range of network topologies to achieve high…”
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Artifact: End-to-End Multi-Modal Tiny-CNN for Cardiovascular Monitoring on Sensor Patches by Ibrahim, Mustafa Fuad Rifet, Alkanat, Tunc, Meijer, Maurice, Schlaefer, Alexander, Stelldinger, Peer

“…This document describes the content and usage of the code artifact files of the original paper "End-to-End Multi-Modal Tiny-CNN for Cardiovascular Monitoring…”
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Influence of metal coverage on transistor mismatch and variability in copper damascene based CMOS technologies by Wils, Nicole, Tuinhout, Hans, Meijer, Maurice

“…This paper summarizes a comprehensive study on the effect of asymmetrical metal coverage on matching performance for a 45 nm copper damascene based CMOS…”
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Characterization of STI Edge Effects on CMOS Variability by Wils, N., Tuinhout, H.P., Meijer, M.

“…Layout effects (well proximity effect, gate-STI distance effect, litho proximity effects, etc.) can lead to significant deviations between measured and modeled…”
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CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories by Shi, Man, Colleman, Steven, VanDeMieroop, Charlotte, Joseph, Antony, Meijer, Maurice, Dehaene, Wim, Verhelst, Marian

“…Deep neural networks (DNN) use a wide range of network topologies to achieve high accuracy within diverse applications. This model diversity makes it…”
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End-to-End Multi-Modal Tiny-CNN for Cardiovascular Monitoring on Sensor Patches by Rifet Ibrahim, Mustafa Fuad, Alkanat, Tunc, Meijer, Maurice, Schlaefer, Alexander, Stelldinger, Peer

“…The vast majority of cardiovascular diseases are avoidable or treatable by preventive measures and early de-tection. To efficiently detect early signs and risk…”
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Methodology to evaluate long channel matching deterioration and effects of transistor segmentation on MOSFET matching by Tuinhout, Hans, Wils, Nicole, Meijer, Maurice, Andricciola, Pietro

“…This paper summarizes an experimental study on matching of long NMOS transistors and the effects of splitting-up long transistors into series of short…”
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A forward body bias generator for digital CMOS circuits with supply voltage scaling by Meijer, M, de Gyvez, J P, Kup, B, van Uden, B, Bastiaansen, P, Lammers, M, Vertregt, M

“…We propose a new fully-integrated forward body bias (FBB) generator that holds its voltage constant relative to the (scalable) power supply of a digital IP…”
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Influence of STI stress on drain current matching in advanced CMOS by Wils, N., Tuinhout, H., Meijer, M.

“…Using a dedicated set of - asymmetrically designed - matched pair test structures and a data analysis technique based on so-called mismatch sweeps, we answer…”
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Active noise cancellation using aggressor-aware clamping circuit for robust on-chip communication by Katoch, A., Meijer, M., Jain, S.K.

“…As the IC process technology scales the on-chip wiring network becomes denser. Increasing aspect ratios of the on-chip interconnects lead to higher coupling…”
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Technology scaling of critical charges in storage circuits based on cross-coupled inverter-pairs by Heijmen, T., Kruseman, B., van Veen, R., Meijer, M.

“…Soft error rate is an important reliability issue in deep-submicron IC design. Crucial is the impact of technology scaling on the critical charges of SRAM…”
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Limits to performance spread tuning using adaptive voltage and body biasing by Meijer, M., Pessolano, F., de Gyvez, J.P.

“…We examine technology constraints on tuning active power and delay using adaptive voltage scaling (AVS) and adaptive body biasing (ABB) design techniques. To…”
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Body bias driven design synthesis for optimum performance per area by Meijer, Maurice, de Gyvez, Jose Pineda

“…Worst-case design uses extreme process corner conditions which rarely occur. This costs additional power due to area over-dimensioning during synthesis. We…”
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