Search Results - "Mehrabani, Yavar Safaei"

Noise and Process Variation Tolerant, Low-Power, High-Speed, and Low-Energy Full Adders in CNFET Technology by Safaei Mehrabani, Yavar, Eshghi, Mohammad

“…In this paper, a number of novel 1-bit full adder cells using carbon nanotube field-effect transistor devices are presented. First of all, some two-input…”
Get full text

A low-PDAP and high-PSNR approximate 4:2 compressor cell in CNFET technology by Safaei Mehrabani, Yavar, Bagherizadeh, Mehdi, Shafiabadi, Mohammad Hossein, Ghasempour, Abolghasem

“…Purpose This paper aims to present an inexact 4:2 compressor cell using carbon nanotube filed effect transistors (CNFETs). Design/methodology/approach To…”
Get full text

A Symmetric, Multi-Threshold, High-Speed and Efficient-Energy 1-Bit Full Adder Cell Design Using CNFET Technology by Safaei Mehrabani, Yavar, Eshghi, Mohammad

“…This paper presents two asymmetric and symmetric multi-threshold, high-speed, and energy-efficient Full Adder cells using Carbon Nanotube Field Effect…”
Get full text

Low-power and high-speed approximate 4:2 compressors for image multiplication applications in CNFETs by Rostami, Danial, Eshghi, Mohammad, Mehrabani, Yavar Safaei

“…Approximate computing is an emerging paradigm to make a trade-off between accuracy and hardware parameters in error resilient applications. Multiplication is…”
Get full text

An optical 2-to-4 decoder based on photonic crystal X-shaped resonators covered by graphene shells by Nayyeri Raad, Ali, Saghaei, Hamed, Mehrabani, Yavar Safaei

“…This paper presents a novel design of a high-speed optical 2-to-4 decoder based on the photonic crystal (PhC) composed of silicon rods. The proposed structure…”
Get full text

DAFA: Dynamic approximate full adders for high area and energy efficiency by Safaei Mehrabani, Yavar, Faghih Mirzaee, Reza

“…As the number of transistors on a chip surface increases, power consumption becomes more and more a serious concern. A promising solution to bridge the gap…”
Get full text

An efficient inexact Full Adder cell design in CNFET technology with high-PSNR for image processing by Ataie, Roghayeh, Emrani Zarandi, Azadeh Alsadat, Safaei Mehrabani, Yavar

“…The design of inexact circuits at the transistor level remarkably improves figures of merits such as power consumption, delay, energy, and area. Therefore,…”
Get full text

Low-power and low-energy CNFET-based approximate full adder cell for image processing applications by Safaei Mehrabani, Yavar, Maleknejad, Mojtaba, Rostami, Danial, Uoosefian, HamidReza

“…Purpose Full adder cells are building blocks of arithmetic circuits and affect the performance of the entire digital system. The purpose of this study is to…”
Get full text

Design of efficient approximate 1-bit Full Adder cells using CNFET technology applicable in motion detector systems by Zareei, Zahra, Bagherizadeh, Mehdi, Shafiabadi, MohammadHossein, Safaei Mehrabani, Yavar

“…In this paper, we present two novel approximate Full Adder cells with capacitive threshold logic (CTL) using carbon nanotube field-effect transistor (CNFET)…”
Get full text

Image processing with high-speed and low-energy approximate arithmetic circuit by Mohammadi, Akram, Ghanatghestani, Mokhtar Mohammadi, Molahosseini, Amir Sabbagh, Mehrabani, Yavar Safaei

“…Nowadays there are plenty of compute-intensive algorithms that are carried out at the edge. Therefore, it is necessary to design low-energy and high-speed…”
Get full text

Erratum to: A Symmetric, Multi-Threshold, High-Speed and Efficient-Energy 1-Bit Full Adder Cell Design Using CNFET Technology by Safaei Mehrabani, Yavar, Eshghi, Mohammad

Get full text

Design of an ASIP processor for MD5 hash algorithm by Mehrabani, Y. S., Eshghi, M., Mehrabani, Y. S.

“…ASIP (Application Specific Instruction set Processor) makes compromise between ASIC (Application Specific Integrated Circuit) and DSP (Digital Signal…”
Get full text