Search Results - "Medeiro, F"

A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta Modulator for low-power high-linearity automotive sensor ASICs by de la Rosa, J.M., Escalera, S., Perez-Verdu, B., Medeiro, F., Guerra, O., del Rio, R., Rodriguez-Vazquez, A.

“…This paper describes a 0.35-/spl mu/m CMOS chopper-stabilized switched-capacitor 2-1 cascade /spl Sigma//spl Delta/ modulator for automotive sensor interfaces…”
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Guest Editorial for January 2004 Special Issue by Rodriguez-Vazquez, A., Medeiro, F., Feely, O.

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A vertically integrated tool for automated design of ΣΔ modulators by MEDEIRO, F, PEREZ-VERDU, B, RODRIGUEZ-VAZQUEZ, A, HUERTAS, J. L

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High-level synthesis of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators using SIMULINK-based time-domain behavioral models by Ruiz-Amaya, J., de la Rosa, J.M., Fernandez, F.V., Medeiro, F., del Rio, R., Perez-Verdu, B., Rodriguez-Vazquez, A.

“…This paper presents a high-level synthesis tool for /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms) that combines an accurate SIMULINK-based…”
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Statistical optimization-based approach for automated sizing of analog cells by Medeiro, F, Fernandez, F V, Dominguez-Castro, R, Rodriguez-Vazquez, A

“…This paper presents a CAD tool for automated sizing of analog cells using statistical optimization in a simulation based approach. A nonlinear penalty-like…”
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High resolution CMOS current comparators: design and applications to current-mode function generation by Rodr guez-V zquez, A., Dom nguez-Castro, R., Medeiro, F., Delgado-Restituto, M.

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Global design of analog cells using statistical optimization techniques by Medeiro, F., Rodr guez-Mac as, R., Fern ndez, F. V., Dom nguez-Castro, R., Huertas, J. L., Rodr guez-V zquez, A.

“…We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. This methodology enables us to…”
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A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology by Medeiro, F., Perez-Verdu, B., Rodriguez-Vazquez, A.

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A CMOS 110-dB%4040-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta Modulator for low-power high-linearity automotive sensor ASICs by de la Rosa, J M, Escalera, S, Perez-Verdu, B, Medeiro, F, Guerra, O, del Rio, R, Rodriguez-Vazquez, A

“…This paper describes a 0.35-mum CMOS chopper-stabilized switched-capacitor 2-1 cascade /spl Sigma//spl Delta/ modulator for automotive sensor interfaces. The…”
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A 2.5-V CMOS wideband sigma-delta modulator by del Rio, R., Medeiro, F., de la Rosa, J.M., Perez-Verdu, B., Rodriguez-Vazquez, A.

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A CMOS 0.8 μm fully differential current mode buffer for HF SI circuits by de la Rosa, J.M., Pérez-Verdú, B., Medeiro, F., Domínguez-Castro, R., Rodríguez-Vázquez, A.

“…We present a high-frequency fully-differential current-mode buffer to interface off-chip currents with no significant degradation of the frequency response,…”
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Top-down design of a xDSL 14-bit 4MS/s sigma-delta modulator in digital CMOS technology by del Rio, R., de la Rosa, J., Medeiro, F., Pérez-Verdú, B., Rodriguez-Vázquez, A.

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High-level synthesis of switched-capacitor, switched-current and continuous-time [Sigma][Delta] modulators using SIMULINK-based time-domain behavioral models by Ruiz-Amaya, J, de la Rosa, J.M, Fernandez, F.V, Medeiro, F, del Rio, R, Perez-Verdu, B, Rodriguez-Vazquez, A

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A CMOS 110-dB0-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta Modulator for low-power high-linearity automotive sensor ASICs by de la Rosa, JM, Escalera, S, Perez-Verdu, B, Medeiro, F, Guerra, O, del Rio, R, Rodriguez-Vazquez, A

“…This paper describes a 0.35- mu m CMOS chopper-stabilized switched-capacitor 2-1 cascade capital sigma Delta modulator for automotive sensor interfaces. The…”
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Architectures and design considerations for wireline SigmaDelta modulators beyond ADSL by Medeiro, F, del Rio, R, de la Rosa, J M, Perez-Verdu, B, Rodriguez-Vazquez, A

“…In this paper we discuss design considerations for sigma-delta modulators (SigmaDeltaMs) aimed at high-linearity high-speed A/D conversion, as required in…”
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Architectures and design considerations for wireline ΣΔ modulators beyond ADSL by Medeiro, F., del Río, R., de la Rosa, J.M., Pérez-Verdú, B., Rodríguez-Vázquez, A.

“…In this paper we discuss design considerations for sigma–delta modulators (ΣΔMs) aimed at high-linearity high-speed A/D conversion, as required in emerging…”
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A vertically integrated tool for automated design of /Sigma//Delta/ modulators by Medeiro, F, Perez-Verdu, B, Rodriguez-Vazquez, A, Huertas, J L

“…We present a tool that starting from high-level specifications of switched-capacitor (SC) /Sigma//Delta/ modulators calculates optimum specifications for their…”
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A 13-bit, 2.2-MS/s, 55-mW multibit cascade /spl Sigma//spl Delta/ modulator in CMOS 0.7-/spl mu/m single-poly technology by Medeiro, F., Perez-Verdu, B., Rodriguez-Vazquez, A.

“…This paper presents a CMOS 0.7-/spl mu/m /spl Sigma//spl Delta/ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16…”
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A 13-bit, 2.2-MS/s, 55-mW multibit cascade Delta modulatorin CMOS 0.7-mu m single-poly technology by Medeiro, F, Perez-Verdu, B, Rodriguez-Vazquez, A

“…This paper presents a CMOS 0.7-mum Delta modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16. It uses fully…”
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Highly linear 2.5-V CMOS /spl Sigma//spl Delta/ modulator for ADSL by del Rio, R., de la Rosa, J.M., Perez-Verdu, B., Delgado-Restituto, M., Dominguez-Castro, R., Medeiro, F., Rodriguez-Vazquez, A.

“…We present a 90-dB spurious-free dynamic range sigma-delta modulator (/spl Sigma//spl Delta/M) for asymmetric digital subscriber line applications (both ADSL…”
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