Search Results - "McNeill, D. W."

Atomic layer deposition of hafnium oxide dielectrics on silicon and germanium substrates by McNeill, D. W., Bhattacharya, S., Wadsworth, H., Ruddell, F. H., Mitchell, S. J. N., Armstrong, B. M., Gamble, H. S.

“…Hafnium oxide films have been deposited at 250 °C on silicon and germanium substrates by atomic layer deposition (ALD), using tetrakis-ethylmethylamino hafnium…”
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Fermi level de-pinning of aluminium contacts to n -type germanium using thin atomic layer deposited layers by Gajula, D. R., Baine, P., Modreanu, M., Hurley, P. K., Armstrong, B. M., McNeill, D. W.

“…Fermi-level pinning of aluminium on n-type germanium (n-Ge) was reduced by insertion of a thin interfacial dielectric by atomic layer deposition. The barrier…”
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Germanium on sapphire substrates for system on a chip by Gamble, H.S., Armstrong, B.M., Baine, P.T., Low, Y.H., Rainey, P.V., Low, Y.W., McNeill, D.W., Mitchell, S.J.N., Montgomery, J.H., Ruddell, F.H.

“…Germanium on sapphire (GeOS) is proposed for system on a chip applications. Sapphire substrates are demonstrated to exhibit lower rf losses and superior…”
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Optimisation and scaling of interfacial GeO2 layers for high-κ gate stacks on germanium and extraction of dielectric constant of GeO2 by Murad, S.N.A., Baine, P.T., McNeill, D.W., Mitchell, S.J.N., Armstrong, B.M., Modreanu, M., Hughes, G., Chellappan, R.K.

“…► Scaling of thermal GeO2 thickness at 550°C using N2 dilution. ► Physical characterisation of scaled GeO2 layers. ► Fabrication and testing of high-κ gate…”
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Investigation of copper layers deposited by CVD using Cu(I)hfac(TMVS) precursor by TOH, B. H. W, MCNEILL, D. W, GAMBLE, H. S

“…Chemical vapour deposition (CVD) of copper on titanium-coated substrates was performed in a stainless steel reactor using copper(I) hexafluoroacetylacetonate…”
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Characterisation of copper inductors fabricated by dual damascene and electroplating techniques by TOH, B. H. W, MCNEILL, D. W, GAMBLE, H. S

“…Spiral inductors were fabricated in copper to take advantage of its low resistivity. The single-layered square inductors, with number of turns varying from 2…”
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Low temperature fabrication and characterization of nickel germanide Schottky source/drain contacts for implant-less germanium p-channel metal-oxide-semiconductor field-effect transistors by Gajula, D. R., McNeill, D. W., Coss, B. E., Dong, H., Jandhyala, S., Kim, J., Wallace, R. M., Armstrong, B. M.

“…In this work, nickel germanide Schottky contacts have been fabricated on n-type germanium (n-Ge) with an optimum barrier height of 0.63eV. For rapid thermal…”
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Tungsten silicide contacts to polycrystalline silicon and silicon–germanium alloys by Srinivasan, G., Bain, M.F., Bhattacharyya, S., Baine, P., Armstrong, B.M., Gamble, H.S., McNeill, D.W.

“…Silicon–germanium alloy layers will be employed in the source–drain engineering of future MOS transistors. The use of this technology offers advantages in…”
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Electrical characterization of SOI substrates incorporating WSix ground planes by BAIN, M, JIN, M, LOH, S. H, BAINE, P, ARMSTRONG, B. M, GAMBLE, H. S, MCNEILL, D. W

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Investigation of stress and structural damage in H and He implanted Ge using micro-Raman mapping technique on bevelled samples by Wasyluk, J., Rainey, P. V., Perova, T. S., Mitchell, S. J. N., McNeill, D. W., Gamble, H. S., Armstrong, B. M., Hurley, R.

“…The results on structural damage in germanium wafers caused by hydrogen and helium implants of typical doses used in Smart Cut™ Technology (1–6 × 1016…”
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Silicon-on-insulator substrates with buried tungsten silicide layer by Gamble, H.S, Armstrong, B.M, Baine, P, Bain, M, McNeill, D.W

“…Tungsten silicide layers can be incorporated into silicon-on-insulator (SOI) substrates produced by direct wafer bonding. The series resistance of…”
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An investigation into the performance of diffusion barrier materials against copper diffusion using metal-oxide-semiconductor (MOS) capacitor structures by Len, Vee S.C, Hurley, R.E, McCusker, N, McNeill, D.W, Armstrong, B.M, Gamble, H.S

“…Cu/SiO 2/Si capacitors were fabricated, with and without barrier layers between the copper and the oxide, and the dielectric properties of the 100 nm thermal…”
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Surface electromigration of sputtered copper patterned using ion milling or chemical mechanical polishing by Toh, B H; W, Mccusker, N D, Mcneill, D W, Gamble, H S, Len, V

“…Electromigration characteristics of sputtered copper patterned both by ion milling and, more recently, by chemical mechanical polishing (CMP) have been…”
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Germanium MOS capacitors with hafnium dioxide and silicon dioxide dielectrics by Wadsworth, H.J., Bhattacharya, S., McNeill, D.W., Ruddell, F.H., Armstrong, B.M., Gamble, H.S., Denvir, D.

“…Germanium (Ge) does not grow a suitable oxide for MOS devices. The Ge/dielectric interface is of prime importance to the operation of photo-detectors and…”
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The application of limited reaction processing to the deposition of silicon carbide layers by Ruddell, F H, McNeill, D W, Armstrong, B M, Gamble, H S

“…This paper describes the deposition of microcrystalline silicon carbide in an LRP reactor using silane/propane gas chemistry and discusses the performance of…”
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Optimisation and scaling of interfacial GeO2 layers for high-[kappa] gate stacks on germanium and extraction of dielectric constant of GeO2 by Murad, SNA, Baine, P T, McNeill, D W, Mitchell, SJN, Armstrong, B M, Modreanu, M, Hughes, G, Chellappan, R K

“…Germanium is an attractive channel material for MOSFETs because of its higher mobility than silicon. In this paper, GeO2 has been investigated as an…”
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Comparison of Si1−yCy films produced by solid-phase epitaxy and rapid thermal chemical vapour deposition by Ray, S.K., McNeill, D.W., Gay, D.L., Maiti, C.K., Armstrong, G.A., Armstrong, B.M., Gamble, H.S.

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Germanium on sapphire by wafer bonding by Baine, P.T., Gamble, H.S., Armstrong, B.M., M cNeill, D.W., Mitchell, S.J.N., Low, Y.H., Rainey, P.V.

“…This paper describes the creation of a germanium on sapphire platform, via wafer bonding technology, for system-on-a-chip applications. Similar thermal…”
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Electrical characterization of SOI substrates incorporating WSi/x/ ground planes by Bain, M, Jin, M, Loh, S H, Baine, P, Armstrong, B M, Gamble, H S, McNeill, D W

“…Silicon-on-insulator (SOI) substrates incorporating tungsten silicide ground planes (GPs) have been shown to offer the lowest reported crosstalk figure of…”
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Electrical characterization of SOI substrates incorporating WSi sub(x) ground planes by Bain, M, Jin, M, Loh, SH, Baine, P, Armstrong, B M, Gamble, H S, McNeill, D W

“…Silicon-on-insulator (SOI) substrates incorporating tungsten silicide ground planes (GPs) have been shown to offer the lowest reported crosstalk figure of…”
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