Search Results - "Masumi Saitoh"
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Guest Editorial Special Section on EDTM 2022
Published in IEEE journal of the Electron Devices Society (2022)“…This Special Issue of the IEEE Journal of the Electron Devices Society is a selection of papers presented at the 2022 IEEE Electron Devices Technology and…”
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Low-power linear computation using nonlinear ferroelectric tunnel junction memristors
Published in Nature electronics (11-05-2020)“…Analogue in-memory computing using memristors could alleviate the performance constraints imposed by digital von Neumann systems in data-intensive tasks…”
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3
Comprehensive study of variability in poly-Si channel nanowire transistor
Published in Japanese Journal of Applied Physics (01-04-2019)“…Variability in poly-Si nanowire transistors (NW Tr.) is studied with respect to device and grain size. Threshold voltage (Vth) variability decreases as grain…”
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4
Experimental Study of Random Telegraph Noise in Trigate Nanowire MOSFETs
Published in IEEE transactions on electron devices (01-11-2015)“…Random telegraph noise (RTN) in trigate nanowire transistors (NW Tr.) is systematically studied with respect to the NW size dependence. Time to capture and…”
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5
Probing spatial heterogeneity in silicon thin films by Raman spectroscopy
Published in Scientific reports (29-11-2017)“…Raman spectroscopy is a powerful technique for revealing spatial heterogeneity in solid-state structures but heretofore has not been able to measure spectra…”
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6
Toe Clearance Rehabilitative Slippers for Older Adults With Fall Risk: A Randomized Controlled Trial
Published in Geriatric orthopaedic surgery & rehabilitation (2021)“…Introduction: To evaluate fall-prevention rehabilitative slippers for use by self-caring, independent older adults. Materials and Methods: This…”
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7
Threshold Voltage Control by Substrate Bias in 10-nm-Diameter Tri-Gate Nanowire MOSFET on Ultrathin BOX
Published in IEEE electron device letters (01-02-2013)“…We investigated the substrate bias effect in 10-nm-diameter tri-gate nanowire (NW) MOSFETs on ultrathin BOX. By employing a thin BOX of 20 nm and a thin NW…”
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Individual analysis of inter and intragrain defects in electrically characterized polycrystalline silicon nanowire TFTs by multicomponent dark-field imaging based on nanobeam electron diffraction two-dimensional mapping
Published in Japanese Journal of Applied Physics (01-04-2018)“…We visualize the grain structures for individual nanosized thin film transistors (TFTs), which are electrically characterized, with an improved data processing…”
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Experimental study of time-dependent dielectric breakdown in tri-gate nanowire transistor
Published in Japanese Journal of Applied Physics (01-08-2016)“…We systematically investigate the size dependence of the time-dependent dielectric breakdown (TDDB) in a tri-gate nanowire transistor (NW Tr.). It is newly…”
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10
Channel size dependence of low-frequency noise in tri-gate silicon nanowire transistors
Published in Japanese Journal of Applied Physics (01-04-2015)“…We systematically study the channel size dependence of drain current noise amplitude in tri-gate silicon nanowire transistors (NW Tr.) by measuring a large…”
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11
Experimental Study of Self-Heating Effects in Trigate Nanowire MOSFETs Considering Device Geometry
Published in IEEE transactions on electron devices (01-12-2012)“…Temperature rise by self-heating effects in nanowire (NW) transistors (NW Trs.) is systematically studied with respect to their dependence on the structural…”
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12
Extension of Coulomb blockade region by quantum confinement in the ultrasmall silicon dot in a single-hole transistor at room temperature
Published in Applied physics letters (19-04-2004)“…First room-temperature (RT) observation of extended Coulomb blockade (CB) region due to quantum confinement in the ultrasmall silicon dot in a single-hole…”
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13
Physical mechanism of source and drain resistance reduction for high-performance short-channel InGaZnO thin-film transistors
Published in Japanese Journal of Applied Physics (01-04-2015)“…We systematically study the mechanism of source and drain parasitic resistance reduction in amorphous InGaZnO thin-film transistors. Hall measurement shows…”
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14
SPICE-Based Performance Analysis of Trigate Silicon Nanowire CMOS Circuits
Published in IEEE transactions on electron devices (01-04-2013)“…An ultralow-voltage performance is investigated in nanowire transistors (NW Tr.) CMOS circuits. SPICE model parameters of BSIM4 are extracted from measurement…”
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15
Voltage gain dependence of the negative differential conductance width in silicon single-hole transistors
Published in Applied physics letters (03-04-2006)“…The full width at half maximum (FWHM) of the negative differential conductance (NDC) characteristics in room temperature (RT)-operating silicon single-hole…”
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16
Physical Origins of Threshold Voltage Variation Enhancement in Si(110) n/pMOSFETs
Published in IEEE transactions on electron devices (01-10-2010)“…Threshold voltage V th variations in scaled (110) n/pMOSFETs are systematically investigated. V th variations in (110) nMOSFETs and pMOSFETs with high channel…”
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17
Large memory window and long charge-retention time in ultranarrow-channel silicon floating-dot memory
Published in Applied physics letters (17-03-2003)“…We propose and demonstrate an ultranarrow-channel silicon floating-dot memory, in which the channel width is scaled to sub-10 nm. In the fabricated…”
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18
Experimental study of uniaxial stress effects on Coulomb-limited mobility in p -type metal-oxide-semiconductor field-effect transistors
Published in Applied physics letters (12-11-2007)“…Uniaxial stress effects on Coulomb-limited mobility ( μ Coulomb ) in Si metal-oxide-semiconductor field-effect transistors (MOSFETs) are investigated…”
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One-to-one correspondence between nm-resolution channel crystallinity and electrical property of poly-Si TFT revealed by NBD two-dimensional imaging
Published in 2017 IEEE International Reliability Physics Symposium (IRPS) (01-04-2017)“…We successfully established the direct correspondence between the whole channel crystallinity at nm-scale and electrical property in one and the same poly-Si…”
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Conference Proceeding -
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Systematic study of RTN in nanowire transistor and enhanced RTN by hot carrier injection and negative bias temperature instability
Published in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers (01-06-2014)“…We experimentally study the random telegraph noise (RTN) in nanowire transistor (NW Tr.) with various widths (W), lengths (L), and heights (H). Time components…”
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Conference Proceeding