Search Results - "Martin, Russel A."

51.1: Integrated Touch Sensing and Frontlighting Device and Display Applications by Bita, Ion, Elloway, Donald J., Rao, Rashmi R., Martin, Russel A., Webster, James R., Gusev, Evgeni P.

“…A novel device architecture is introduced which enables projected capacitive touch sensing and front illumination in a single substrate configuration. The…”
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20.4: Distinguished Paper: Optimizing the Brightness of Reflective Displays in Mobile Applications by Bita, Ion, Tavakoli, Hamid, Poliakov, Evgeni, Li, Kebin, Fiske, Thomas, Gille, Jennifer, Martin, Russel A

“…Reflective display brightness is studied in mobile devices as a function of relevant ambient conditions, supplemental frontlight illumination, and display…”
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Bioimpedance Method for Human Body Hydration Assessment by Leonov, Vladimir, Lee, Seulki, Londergan, Ana, Martin, Russel A., De Raedt, Walter, Van Hoof, Chris

“…A high-precision wearable bioimpedance sensor developed at Imec was extensively tested. Unlike known bioimpedance sensors on the market, the new device enables…”
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Amorphous silicon shift register for addressing output drivers by Da Costa, V.M., Martin, R.A.

“…An amorphous silicon (a-Si) shift register is described. By integrating this shift register design with an array of a-Si drivers, the cost/complexity of the…”
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26.1: Invited Paper: Driving mirasol® Displays: Addressing Methods and Control Electronics by Martin, Russel A., Lewis, Alan, Mignard, Marc, Chuei, Nao, van Lier, Rob, Govil, Alok, Todorovich, Mark, Aflatooni, Koorosh, Gally, Brian, Chui, Clarence

“…A mirasol display uses optical interference based MEMS pixels with inherent hysteresis and is therefore passively addressable with a near zero power hold…”
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Hot-electron-induced punchthrough (HEIP) effect in submicrometer PMOSFET's by Koyanagi, M., Lewis, A.G., Martin, R.A., Tiao-Yuan Huang, Chen, J.Y.

“…Degradation of device characterisitics due to hot-carrier injection in submicrometer PMOSFET has been investigated. We found that in submicrometer p-channel…”
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Latchup performance of retrograde and conventional n-well CMOS technologies by Lewis, A.G., Martin, R.A., Tiao-Yuan Huang, Chen, J.Y., Koyanagi, M.

“…The static and transient latchup performance of conventional and retrograde n-well CMOS technologies is compared. The retrograde n-well structures are shown to…”
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Punchthrough current for submicrometer MOSFETs in CMOS VLSI by Zhu, J., Martin, R.A., Chen, J.Y.

“…Simulated and measured data show that drain-induced barrier lowering (DIBL) in buried-channel MOSFETs is different from that in surface channel (SC) MOSFETs…”
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Optimized retrograde N-well for 1-μm CMOS technology by MARTIN, R. A, CHEN, J. Y.-T

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A new LDD transistor with inverse-T gate structure by Tiao-Yuan Huang, Yao, W.W., Martin, R.A., Lewis, A.G., Koyanagi, M., Chen, J.Y.

“…A new submicrometer inverse-T lightly doped drain (ITLDD) transistor structure for alleviating hot-electron effects is demonstrated. A thin extension of the…”
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Device isolation in high-density LOCOS-isolated CMOS by Lewis, A.G., Chen, J.Y., Martin, R.A., Tiao-Yuan Huang

“…Leakage paths between n- and p-channel devices in high packing density CMOS circuits fabricated using standard LOCOS isolation are investigated. Experimental…”
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Vertical isolation in shallow n-well CMOS circuits by Lewis, A.G., Martin, R.A., Chen, J.Y., Tiao-Yuan Huang, Koyanagi, M.

“…This letter examines vertical punchthrough in a shallow conventional n-well suitable for use in high-packing-density VLSI CMOS circuits. It is shown that full…”
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Scaling CMOS Technologies with Constant Latch-Up Immunity by Lewis, Alan G., Martin, Russel A., Huang, Tiao Y., Chen, John Y., Bruce, Richard H.

“…High performance CMOS circuits can be realized by scaling device dimensions into the sub-micron range. However, this also improves the performance of the…”
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850V NMOS driver with active outputs by Martin, R.A., Buhler, S.A., Lao, G.

“…This paper describes a unique second generation fully integrated NMOS device operating at up to 850V. The 5.46×5.26 mm 2 chip consists of 16 pull-up/pull-down…”
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Intrinsic capacitance of amorphous silicon and polysilicon thin film transistors by Martin, R.A., Hack, M., Shaw, J.G., Shur, M.

“…Results on the capacitance of thin-film transistors (TFTs) as a function of gate and drain voltage are shown. Measurements of amorphous silicon (a-Si) TFTs are…”
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Device design considerations of a novel high voltage amorphous silicon thin film transistor by Martin, R.A., Peng Kein Yap, Hack, M., Hsing Tuan

“…The performance of a novel high voltage thin film transistor has been characterized in terms of its geometry and operating conditions. Excellent performance,…”
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Enhancement of performance and reliability of amorphous silicon high voltage thin film transistors by use of field plates by Martin, R.A., Yap, P.K., Shaw, J.G., Hack, M., Sugiura, N., Hamano, T.

“…An enhancement to the amorphous silicon (a-Si) high-voltage thin-film transistor (HVTFT) is described. With the addition of a field plate over a portion of the…”
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High voltage NMOS switching array with active pull-ups and low voltage addressing logic by Buhler, S.A., Martin, R.A., Heald, D.L., Ronen, R.S.

“…This paper describes a unique, fully integrated NMOS device capable of operation at 500 volts. The chip consists of 16 active, pull-up devices, 16…”
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