Search Results - "Marmiroli, A."
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Giant Random Telegraph Signals in Nanoscale Floating-Gate Devices
Published in IEEE electron device letters (01-12-2007)“…The magnitude of a random telegraph signal (RTS) in nanoscale floating-gate devices has been experimentally investigated as a function of carrier…”
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A new compact DC model of floating gate memory cells without capacitive coupling coefficients
Published in IEEE transactions on electron devices (01-02-2002)“…This paper presents for the first time a new compact SPICE model of floating gate nonvolatile memory cells capable to reproduce effectively the complete DC…”
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The impact of the surgical waiting list for transurethral resection of the prostate on patient’s clinical course: A single center investigation
Published in European urology (01-03-2024)Get full text
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TEM/CBED determination of strain in silicon-based submicrometric electronic devices
Published in Micron (Oxford, England : 1993) (01-06-2000)“…The convergent beam electron diffraction technique (CBED) of the transmission electron microscopy (TEM) has been employed to determine the strain distribution…”
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Influence of the silicon nitride oxidation on the performances of NCLAD isolation
Published in Microelectronics and reliability (01-05-1998)“…In order to study NCLAD isolation structures, a silicon nitride oxidation model has been studied and implemented in the process simulation program IMPACT-4…”
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Process Analysis using RSM and Simulation
Published in ESSDERC '92: 22nd European Solid State Device Research conference (1992)“…In this paper a statistical analysis of an advanced CMOS process performed using the Response Surface Method (RSM) applied to process/device simulation is…”
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Conference Proceeding -
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Aluminum Thinning onto Blanket and Etched Back Tungsten Plugs: Simulation of Geometrical Effects
Published in ESSDERC '92: 22nd European Solid State Device Research conference (1992)“…The blanket and etch back technique has been been introduced successfully in process flows for vias and contact holes filling. The possibility of application…”
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Conference Proceeding -
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Modeling of STI-induced stress phenomena in CMOS 90nm Flash technology
Published in Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) (2004)“…A non negligible layout sensitivity of MOSFETS electrical behavior has been recently observed in advanced CMOS technologies. Some efforts have been attempted…”
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Conference Proceeding -
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Modeling the VTH fluctuations in nanoscale Floating Gate memories
Published in 2008 International Conference on Simulation of Semiconductor Processes and Devices (01-09-2008)“…Tight bits distribution is a must to fabricate multi-level Non-Volatile Memory (NVM) technology needed to reach a high degree of integration. On the contrary,…”
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Conference Proceeding -
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Implementation of nitride oxidation in the 2D process simulator IMPACT-4
Published in 1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095) (1996)“…To shrink the dimension of devices, new isolation technologies, with respect to classical LOCOS, have to be evaluated. This paper deals with the study of one…”
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Conference Proceeding -
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Device simulation for smart integrated systems (DESSIS)
Published in Proceedings of Third International Conference on Electronics, Circuits, and Systems (1996)“…In this paper we present the most important achievements of the ESPRIT 6075 (DESSIS) Project, which was carried out in the period 1992-1995 with the…”
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Conference Proceeding -
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Influence of the Silicon Nitride Oxidation on the Performances of NCLAD Isolation
Published in ESSDERC '96: Proceedings of the 26th European Solid State Device Research Conference (01-09-1996)“…A Deal and Grove model for the oxidation of the nitride isolation masks has been found, and has been implemented in the 2D Process simulator IMPACT-4 [2]. This…”
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Conference Proceeding