Search Results - "Manley, M.H."

A systematic test methodology for identifying defect-related failure mechanisms in an EEPROM technology by Hoffstetter, D.M., Manley, M.H.

“…A new test methodology is described for identifying defect-related failures of EEPROM memory cells. Currently, tunnel oxide Qbd tests are widely used to…”
Get full text

A high-speed ultra-low power 64K CMOS EPROM with on-chip test functions by Knecht, M.W., Manley, M.H., Perasso, D.C., Thomas, J.F., Keshtbod, P., Tandan, N., Simmons, G.H.

“…A 100 ns 8K /spl times/ 8 CMOS EPROM has been developed. Internal clock signals generated by address transition detection are used to reduce power consumption…”
Get full text

A modular 1 mu m CMOS single polysilicon EPROM PLD technology by Cacharelis, P.J., Hart, M.J., Manley, M.H., Frake, S.O., Knecht, M.W.

“…The authors describe a single-polysilicon CMOS process that has been optimized for the production of high-speed programmable logic devices (PLDs). The process…”
Get full text